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-rw-r--r--techlibs/ice40/Makefile.inc6
-rw-r--r--techlibs/ice40/abc9_hx.box17
-rw-r--r--techlibs/ice40/abc9_hx.lut6
-rw-r--r--techlibs/ice40/abc9_lp.box17
-rw-r--r--techlibs/ice40/abc9_lp.lut6
-rw-r--r--techlibs/ice40/abc9_model.v59
-rw-r--r--techlibs/ice40/abc9_u.box17
-rw-r--r--techlibs/ice40/abc9_u.lut6
-rw-r--r--techlibs/ice40/cells_sim.v1411
-rw-r--r--techlibs/ice40/ice40_braminit.cc14
-rw-r--r--techlibs/ice40/ice40_ffinit.cc32
-rw-r--r--techlibs/ice40/ice40_ffssr.cc34
-rw-r--r--techlibs/ice40/ice40_opt.cc94
-rw-r--r--techlibs/ice40/synth_ice40.cc47
14 files changed, 1499 insertions, 267 deletions
diff --git a/techlibs/ice40/Makefile.inc b/techlibs/ice40/Makefile.inc
index 31478e80e..b9e504a9d 100644
--- a/techlibs/ice40/Makefile.inc
+++ b/techlibs/ice40/Makefile.inc
@@ -29,12 +29,6 @@ $(eval $(call add_share_file,share/ice40,techlibs/ice40/brams.txt))
$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams_map.v))
$(eval $(call add_share_file,share/ice40,techlibs/ice40/dsp_map.v))
$(eval $(call add_share_file,share/ice40,techlibs/ice40/abc9_model.v))
-$(eval $(call add_share_file,share/ice40,techlibs/ice40/abc9_hx.box))
-$(eval $(call add_share_file,share/ice40,techlibs/ice40/abc9_hx.lut))
-$(eval $(call add_share_file,share/ice40,techlibs/ice40/abc9_lp.box))
-$(eval $(call add_share_file,share/ice40,techlibs/ice40/abc9_lp.lut))
-$(eval $(call add_share_file,share/ice40,techlibs/ice40/abc9_u.box))
-$(eval $(call add_share_file,share/ice40,techlibs/ice40/abc9_u.lut))
$(eval $(call add_gen_share_file,share/ice40,techlibs/ice40/brams_init1.vh))
$(eval $(call add_gen_share_file,share/ice40,techlibs/ice40/brams_init2.vh))
diff --git a/techlibs/ice40/abc9_hx.box b/techlibs/ice40/abc9_hx.box
deleted file mode 100644
index 31e743669..000000000
--- a/techlibs/ice40/abc9_hx.box
+++ /dev/null
@@ -1,17 +0,0 @@
-# From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_hx8k.txt
-
-# NB: Box inputs/outputs must each be in the same order
-# as their corresponding module definition
-# (with exceptions detailed below)
-
-# Box 1 : $__ICE40_CARRY_WRAPPER (private cell used to preserve
-# SB_LUT4+SB_CARRY)
-# (Exception: carry chain input/output must be the
-# last input and output and the entire bus has been
-# moved there overriding the otherwise
-# alphabetical ordering)
-# name ID w/b ins outs
-$__ICE40_CARRY_WRAPPER 1 1 5 2
-#A B I0 I3 CI
-400 379 449 316 316 # O
-259 231 - - 126 # CO
diff --git a/techlibs/ice40/abc9_hx.lut b/techlibs/ice40/abc9_hx.lut
deleted file mode 100644
index 3b3bb11e2..000000000
--- a/techlibs/ice40/abc9_hx.lut
+++ /dev/null
@@ -1,6 +0,0 @@
-# From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_hx8k.txt
-# I3 I2 I1 I0
-1 1 316
-2 1 316 379
-3 1 316 379 400
-4 1 316 379 400 449
diff --git a/techlibs/ice40/abc9_lp.box b/techlibs/ice40/abc9_lp.box
deleted file mode 100644
index 71986a67b..000000000
--- a/techlibs/ice40/abc9_lp.box
+++ /dev/null
@@ -1,17 +0,0 @@
-# From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_lp8k.txt
-
-# NB: Box inputs/outputs must each be in the same order
-# as their corresponding module definition
-# (with exceptions detailed below)
-
-# Box 1 : $__ICE40_CARRY_WRAPPER (private cell used to preserve
-# SB_LUT4+SB_CARRY)
-# (Exception: carry chain input/output must be the
-# last input and output and the entire bus has been
-# moved there overriding the otherwise
-# alphabetical ordering)
-# name ID w/b ins outs
-$__ICE40_CARRY_WRAPPER 1 1 5 2
-#A B I0 I3 CI
-589 558 661 465 465 # O
-675 609 - - 186 # CO
diff --git a/techlibs/ice40/abc9_lp.lut b/techlibs/ice40/abc9_lp.lut
deleted file mode 100644
index e72f760a2..000000000
--- a/techlibs/ice40/abc9_lp.lut
+++ /dev/null
@@ -1,6 +0,0 @@
-# From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_lp8k.txt
-# I3 I2 I1 I0
-1 1 465
-2 1 465 558
-3 1 465 558 589
-4 1 465 558 589 661
diff --git a/techlibs/ice40/abc9_model.v b/techlibs/ice40/abc9_model.v
index a5e5f4372..84923d381 100644
--- a/techlibs/ice40/abc9_model.v
+++ b/techlibs/ice40/abc9_model.v
@@ -1,4 +1,4 @@
-(* abc9_box_id = 1, lib_whitebox *)
+(* abc9_box, lib_whitebox *)
module \$__ICE40_CARRY_WRAPPER (
(* abc9_carry *)
output CO,
@@ -26,4 +26,61 @@ module \$__ICE40_CARRY_WRAPPER (
.I3(I3_OR_CI),
.O(O)
);
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L79
+ (CI => CO) = (126, 105);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L80
+ (I0 => O) = (449, 386);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L82
+ (A => CO) = (259, 245);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L83
+ (A => O) = (400, 379);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L85
+ (B => CO) = (231, 133);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L86
+ (B => O) = (379, 351);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L88
+ (I3 => O) = (316, 288);
+ (CI => O) = (316, 288);
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L79
+ (CI => CO) = (186, 155);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L80
+ (I0 => O) = (662, 569);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L82
+ (A => CO) = (382, 362);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L83
+ (A => O) = (589, 558);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L85
+ (B => CO) = (341, 196);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L86
+ (B => O) = (558, 517);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L88
+ (I3 => O) = (465, 423);
+ (CI => O) = (465, 423);
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L91
+ (CI => CO) = (278, 278);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L92
+ (I0 => O) = (1245, 1285);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L94
+ (A => CO) = (675, 662);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L95
+ (A => O) = (1179, 1232);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L97
+ (B => CO) = (609, 358);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L98
+ (B => O) = (1179, 1205);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L100
+ (I3 => O) = (861, 874);
+ (CI => O) = (861, 874);
+ endspecify
+`endif
endmodule
diff --git a/techlibs/ice40/abc9_u.box b/techlibs/ice40/abc9_u.box
deleted file mode 100644
index 3d4b93834..000000000
--- a/techlibs/ice40/abc9_u.box
+++ /dev/null
@@ -1,17 +0,0 @@
-# From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_up5k.txt
-
-# NB: Box inputs/outputs must each be in the same order
-# as their corresponding module definition
-# (with exceptions detailed below)
-
-# Box 1 : $__ICE40_CARRY_WRAPPER (private cell used to preserve
-# SB_LUT4+SB_CARRY)
-# (Exception: carry chain input/output must be the
-# last input and output and the entire bus has been
-# moved there overriding the otherwise
-# alphabetical ordering)
-# name ID w/b ins outs
-$__ICE40_CARRY_WRAPPER 1 1 5 2
-#A B I0 I3 CI
-1231 1205 1285 874 874 # O
-675 609 - - 278 # CO
diff --git a/techlibs/ice40/abc9_u.lut b/techlibs/ice40/abc9_u.lut
deleted file mode 100644
index 1e4fcadb6..000000000
--- a/techlibs/ice40/abc9_u.lut
+++ /dev/null
@@ -1,6 +0,0 @@
-# From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_up5k.txt
-# I3 I2 I1 I0
-1 1 874
-2 1 874 1205
-3 1 874 1205 1231
-4 1 874 1205 1231 1285
diff --git a/techlibs/ice40/cells_sim.v b/techlibs/ice40/cells_sim.v
index 50eab5dde..6a0e3031e 100644
--- a/techlibs/ice40/cells_sim.v
+++ b/techlibs/ice40/cells_sim.v
@@ -2,10 +2,6 @@
`define SB_DFF_REG reg Q = 0
// `define SB_DFF_REG reg Q
-`define ABC9_ARRIVAL_HX(TIME) `ifdef ICE40_HX (* abc9_arrival=TIME *) `endif
-`define ABC9_ARRIVAL_LP(TIME) `ifdef ICE40_LP (* abc9_arrival=TIME *) `endif
-`define ABC9_ARRIVAL_U(TIME) `ifdef ICE40_U (* abc9_arrival=TIME *) `endif
-
// SiliconBlue IO Cells
module SB_IO (
@@ -167,53 +163,166 @@ endmodule
// SiliconBlue Logic Cells
-(* lib_whitebox *)
+(* abc9_lut=1, lib_whitebox *)
module SB_LUT4 (output O, input I0, I1, I2, I3);
parameter [15:0] LUT_INIT = 0;
wire [7:0] s3 = I3 ? LUT_INIT[15:8] : LUT_INIT[7:0];
wire [3:0] s2 = I2 ? s3[ 7:4] : s3[3:0];
wire [1:0] s1 = I1 ? s2[ 3:2] : s2[1:0];
assign O = I0 ? s1[1] : s1[0];
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L80
+ (I0 => O) = (449, 386);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L83
+ (I1 => O) = (400, 379);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L86
+ (I2 => O) = (379, 351);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L88
+ (I3 => O) = (316, 288);
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L80
+ (I0 => O) = (662, 569);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L83
+ (I1 => O) = (589, 558);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L86
+ (I2 => O) = (558, 517);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L88
+ (I3 => O) = (465, 423);
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L92
+ (I0 => O) = (1245, 1285);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L95
+ (I1 => O) = (1179, 1232);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L98
+ (I2 => O) = (1179, 1205);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L100
+ (I3 => O) = (861, 874);
+ endspecify
+`endif
endmodule
(* lib_whitebox *)
module SB_CARRY (output CO, input I0, I1, CI);
assign CO = (I0 && I1) || ((I0 || I1) && CI);
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L79
+ (CI => CO) = (126, 105);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L82
+ (I0 => CO) = (259, 245);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_hx1k.txt#L85
+ (I1 => CO) = (231, 133);
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L79
+ (CI => CO) = (186, 155);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L82
+ (I0 => CO) = (382, 362);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_lp1k.txt#L85
+ (I0 => CO) = (341, 196);
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L91
+ (CI => CO) = (278, 278);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L94
+ (I0 => CO) = (675, 662);
+ // https://github.com/cliffordwolf/icestorm/blob/be0bca0230d6fe1102e0a360b953fbb0d273a39f/icefuzz/timings_up5k.txt#L97
+ (I0 => CO) = (609, 358);
+ endspecify
+`endif
endmodule
-// Max delay from: https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
-// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
-// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
-
// Positive Edge SiliconBlue FF Cells
module SB_DFF (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, D
);
always @(posedge C)
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, posedge C, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ (posedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ (posedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ (posedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFE (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, E, D
);
always @(posedge C)
if (E)
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, posedge C &&& E, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (E) (posedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C &&& E, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L73
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (E) (posedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C &&& E, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (E) (posedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFSR (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, R, D
);
@@ -222,12 +331,45 @@ module SB_DFFSR (
Q <= 0;
else
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, posedge C, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L78
+ $setup(R, posedge C, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if ( R) (posedge C => (Q : 1'b0)) = 540;
+ if (!R) (posedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L78
+ $setup(R, posedge C, 299);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if ( R) (posedge C => (Q : 1'b0)) = 796;
+ if (!R) (posedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L90
+ $setup(R, posedge C, 530);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if ( R) (posedge C => (Q : 1'b0)) = 1391;
+ if (!R) (posedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFR (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, R, D
);
@@ -236,12 +378,48 @@ module SB_DFFR (
Q <= 0;
else
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, posedge C, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L63
+ $setup(negedge R, posedge C, 160);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L91
+ (posedge R => (Q : 1'b0)) = 599;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (!R) (posedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L63
+ $setup(negedge R, posedge C, 235);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L91
+ (posedge R => (Q : 1'b0)) = 883;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (!R) (posedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L75
+ $setup(negedge R, posedge C, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L103
+ (posedge R => (Q : 1'b0)) = 1589;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (!R) (posedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFSS (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, S, D
);
@@ -250,12 +428,45 @@ module SB_DFFSS (
Q <= 1;
else
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, posedge C, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L78
+ $setup(S, posedge C, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if ( S) (posedge C => (Q : 1'b1)) = 540;
+ if (!S) (posedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L78
+ $setup(S, posedge C, 299);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if ( S) (posedge C => (Q : 1'b1)) = 796;
+ if (!S) (posedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L90
+ $setup(S, posedge C, 530);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if ( S) (posedge C => (Q : 1'b1)) = 1391;
+ if (!S) (posedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFS (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, S, D
);
@@ -264,12 +475,48 @@ module SB_DFFS (
Q <= 1;
else
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, posedge C, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L63
+ $setup(negedge S, posedge C, 160);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L91
+ (posedge S => (Q : 1'b1)) = 599;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (!S) (posedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L63
+ $setup(negedge S, posedge C, 235);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L91
+ (posedge S => (Q : 1'b1)) = 883;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (!S) (posedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L75
+ $setup(negedge S, posedge C, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L103
+ (posedge S => (Q : 1'b1)) = 1589;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (!S) (posedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFESR (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, E, R, D
);
@@ -280,12 +527,51 @@ module SB_DFFESR (
else
Q <= D;
end
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, posedge C &&& E && !R, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L78
+ $setup(R, posedge C &&& E, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (E && R) (posedge C => (Q : 1'b0)) = 540;
+ if (E && !R) (posedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C &&& E && !R, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L73
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L78
+ $setup(R, posedge C &&& E, 299);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (E && R) (posedge C => (Q : 1'b0)) = 796;
+ if (E && !R) (posedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C &&& E, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L90
+ $setup(R, posedge C &&& E, 530);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (E && R) (posedge C => (Q : 1'b0)) = 1391;
+ if (E && !R) (posedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFER (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, E, R, D
);
@@ -294,12 +580,54 @@ module SB_DFFER (
Q <= 0;
else if (E)
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, posedge C &&& E, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L63
+ $setup(negedge R, posedge C, 160);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L91
+ (posedge R => (Q : 1'b0)) = 599;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (E && !R) (posedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C &&& E, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L73
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L63
+ $setup(negedge R, posedge C, 235);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L91
+ (posedge R => (Q : 1'b0)) = 883;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (E && !R) (posedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C &&& E, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L75
+ $setup(negedge R, posedge C, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L103
+ (posedge R => (Q : 1'b0)) = 1589;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (E && !R) (posedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFESS (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, E, S, D
);
@@ -310,12 +638,51 @@ module SB_DFFESS (
else
Q <= D;
end
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, posedge C &&& E && !S, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L78
+ $setup(S, posedge C &&& E, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (E && S) (posedge C => (Q : 1'b1)) = 540;
+ if (E && !S) (posedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C &&& E && !S, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L73
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L78
+ $setup(S, posedge C &&& E, 299);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (E && S) (posedge C => (Q : 1'b1)) = 796;
+ if (E && !S) (posedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C &&& E, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L90
+ $setup(S, posedge C &&& E, 530);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (E && S) (posedge C => (Q : 1'b1)) = 1391;
+ if (E && !S) (posedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFES (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, E, S, D
);
@@ -324,37 +691,133 @@ module SB_DFFES (
Q <= 1;
else if (E)
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, posedge C &&& E, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L63
+ $setup(posedge S, posedge C, 160);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L91
+ (posedge S => (Q : 1'b1)) = 599;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (E && !S) (posedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C &&& E, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L73
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L63
+ $setup(posedge S, posedge C, 235);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L91
+ (posedge S => (Q : 1'b1)) = 883;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (E && !S) (posedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, posedge C &&& E, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
+ $setup(E, posedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L75
+ $setup(posedge S, posedge C, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L103
+ (posedge S => (Q : 1'b1)) = 1589;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (E && !S) (posedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
// Negative Edge SiliconBlue FF Cells
module SB_DFFN (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, D
);
always @(negedge C)
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, negedge C, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ (negedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ (negedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ (negedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFNE (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, E, D
);
always @(negedge C)
if (E)
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, negedge C &&& E, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (E) (negedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C &&& E, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L73
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (E) (negedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C &&& E, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (E) (negedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFNSR (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, R, D
);
@@ -363,12 +826,45 @@ module SB_DFFNSR (
Q <= 0;
else
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, negedge C, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(R, negedge C, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if ( R) (negedge C => (Q : 1'b0)) = 540;
+ if (!R) (negedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L78
+ $setup(R, negedge C, 299);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if ( R) (negedge C => (Q : 1'b0)) = 796;
+ if (!R) (negedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L90
+ $setup(R, negedge C, 530);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if ( R) (negedge C => (Q : 1'b0)) = 1391;
+ if (!R) (negedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFNR (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, R, D
);
@@ -377,12 +873,48 @@ module SB_DFFNR (
Q <= 0;
else
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, negedge C, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L63
+ $setup(negedge R, negedge C, 160);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L91
+ (posedge R => (Q : 1'b0)) = 599;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (!R) (negedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L63
+ $setup(negedge R, negedge C, 235);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L91
+ (posedge R => (Q : 1'b0)) = 883;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (!R) (negedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L75
+ $setup(negedge R, negedge C, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L103
+ (posedge R => (Q : 1'b0)) = 1589;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (!R) (negedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFNSS (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, S, D
);
@@ -391,12 +923,45 @@ module SB_DFFNSS (
Q <= 1;
else
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, negedge C, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(S, negedge C, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if ( S) (negedge C => (Q : 1'b1)) = 540;
+ if (!S) (negedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L78
+ $setup(S, negedge C, 299);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if ( S) (negedge C => (Q : 1'b1)) = 796;
+ if (!S) (negedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L90
+ $setup(S, negedge C, 530);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if ( S) (negedge C => (Q : 1'b1)) = 1391;
+ if (!S) (negedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFNS (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, S, D
);
@@ -405,12 +970,48 @@ module SB_DFFNS (
Q <= 1;
else
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, negedge C, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L63
+ $setup(negedge S, negedge C, 160);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L91
+ (posedge S => (Q : 1'b1)) = 599;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (!S) (negedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L63
+ $setup(negedge S, negedge C, 235);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L91
+ (posedge S => (Q : 1'b1)) = 883;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (!S) (negedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L75
+ $setup(negedge S, negedge C, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L103
+ (posedge S => (Q : 1'b1)) = 1589;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (!S) (negedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFNESR (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, E, R, D
);
@@ -421,12 +1022,51 @@ module SB_DFFNESR (
else
Q <= D;
end
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, negedge C &&& E && !R, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L78
+ $setup(R, negedge C &&& E, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (E && R) (negedge C => (Q : 1'b0)) = 540;
+ if (E && !R) (negedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C &&& E && !R, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L73
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L78
+ $setup(R, negedge C &&& E, 299);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (E && R) (negedge C => (Q : 1'b0)) = 796;
+ if (E && !R) (negedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C &&& E, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L90
+ $setup(R, negedge C &&& E, 530);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (E && R) (negedge C => (Q : 1'b0)) = 1391;
+ if (E && !R) (negedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFNER (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, E, R, D
);
@@ -435,12 +1075,54 @@ module SB_DFFNER (
Q <= 0;
else if (E)
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, negedge C &&& E, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L63
+ $setup(R, negedge C, 2160);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L91
+ (posedge R => (Q : 1'b0)) = 599;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (E && !R) (negedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C &&& E, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L73
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L63
+ $setup(R, negedge C, 235);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L91
+ (posedge R => (Q : 1'b0)) = 883;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (E && !R) (negedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C &&& E, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L75
+ $setup(negedge R, negedge C, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L103
+ (posedge R => (Q : 1'b0)) = 1589;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (E && !R) (negedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFNESS (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, E, S, D
);
@@ -451,12 +1133,51 @@ module SB_DFFNESS (
else
Q <= D;
end
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, negedge C &&& E && !S, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L78
+ $setup(S, negedge C &&& E, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (E && S) (negedge C => (Q : 1'b1)) = 540;
+ if (E && !S) (negedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C &&& E && !S, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L73
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L78
+ $setup(S, negedge C &&& E, 299);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (E && S) (negedge C => (Q : 1'b1)) = 796;
+ if (E && !S) (negedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C &&& E, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L90
+ $setup(S, negedge C &&& E, 530);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (E && S) (negedge C => (Q : 1'b1)) = 1391;
+ if (E && !S) (negedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
module SB_DFFNES (
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output `SB_DFF_REG,
input C, E, S, D
);
@@ -465,14 +1186,56 @@ module SB_DFFNES (
Q <= 1;
else if (E)
Q <= D;
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ $setup(D, negedge C &&& E, 470 - 449);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L63
+ $setup(negedge S, negedge C, 160);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L91
+ (posedge S => (Q : 1'b1)) = 599;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ if (E && !S) (negedge C => (Q : D)) = 540;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C &&& E, 693 - 662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L73
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L63
+ $setup(negedge S, negedge C, 235);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L91
+ (posedge S => (Q : 1'b1)) = 883;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ if (E && !S) (negedge C => (Q : D)) = 796;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ // minus https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ $setup(D, negedge C &&& E, /*1232 - 1285*/ 0); // Negative times not currently supported
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
+ $setup(E, negedge C, 0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L75
+ $setup(negedge S, negedge C, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L103
+ (posedge S => (Q : 1'b1)) = 1589;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ if (E && !S) (negedge C => (Q : D)) = 1391;
+ endspecify
+`endif
endmodule
// SiliconBlue RAM Cells
module SB_RAM40_4K (
- `ABC9_ARRIVAL_HX(2146) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L401
- `ABC9_ARRIVAL_LP(3163) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L401
- `ABC9_ARRIVAL_U(1179) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13026
output [15:0] RDATA,
input RCLK, RCLKE, RE,
input [10:0] RADDR,
@@ -638,12 +1401,75 @@ module SB_RAM40_4K (
end
end
`endif
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L343-L358
+ $setup(MASK, posedge WCLK &&& WE && WCLKE, 274);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L359-L369
+ $setup(RADDR, posedge RCLK &&& RE && RCLKE, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L370
+ $setup(RCLKE, posedge RCLK, 267);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L371
+ $setup(RE, posedge RCLK, 98);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L372-L382
+ $setup(WADDR, posedge WCLK &&& WE && WCLKE, 224);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L383
+ $setup(WCLKE, posedge WCLK, 267);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L384-L399
+ $setup(WDATA, posedge WCLK &&& WE && WCLKE, 161);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L400
+ $setup(WE, posedge WCLK, 133);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L401
+ (posedge RCLK => (RDATA : 16'bx)) = 2146;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L343-L358
+ $setup(MASK, posedge WCLK &&& WE && WCLKE, 403);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L359-L369
+ $setup(RADDR, posedge RCLK &&& RE && RCLKE, 300);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L370
+ $setup(RCLKE, posedge RCLK, 393);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L371
+ $setup(RE, posedge RCLK, 145);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L372-L382
+ $setup(WADDR, posedge WCLK &&& WE && WCLKE, 331);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L383
+ $setup(WCLKE, posedge WCLK, 393);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L384-L399
+ $setup(WDATA, posedge WCLK &&& WE && WCLKE, 238);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L400
+ $setup(WE, posedge WCLK, 196);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L401
+ (posedge RCLK => (RDATA : 16'bx)) = 3163;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12968-12983
+ $setup(MASK, posedge WCLK &&& WE && WCLKE, 517);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12984-12994
+ $setup(RADDR, posedge RCLK &&& RE && RCLKE, 384);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12995
+ $setup(RCLKE, posedge RCLK, 503);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12996
+ $setup(RE, posedge RCLK, 185);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12997-13007
+ $setup(WADDR, posedge WCLK &&& WE && WCLKE, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13008
+ $setup(WCLKE, posedge WCLK, 503);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13009-13024
+ $setup(WDATA, posedge WCLK &&& WE && WCLKE, 305);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13025
+ $setup(WE, posedge WCLK, 252);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13026
+ (posedge RCLK => (RDATA : 16'bx)) = 1179;
+ endspecify
+`endif
endmodule
module SB_RAM40_4KNR (
- `ABC9_ARRIVAL_HX(2146) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L401
- `ABC9_ARRIVAL_LP(3163) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L401
- `ABC9_ARRIVAL_U(1179) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13026
output [15:0] RDATA,
input RCLKN, RCLKE, RE,
input [10:0] RADDR,
@@ -706,12 +1532,75 @@ module SB_RAM40_4KNR (
.MASK (MASK ),
.WDATA(WDATA)
);
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L343-L358
+ $setup(MASK, posedge WCLK &&& WE && WCLKE, 274);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L359-L369
+ $setup(RADDR, posedge RCLKN &&& RE && RCLKE, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L370
+ $setup(RCLKE, posedge RCLKN, 267);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L371
+ $setup(RE, posedge RCLKN, 98);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L372-L382
+ $setup(WADDR, posedge WCLK &&& WE && WCLKE, 224);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L383
+ $setup(WCLKE, posedge WCLK, 267);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L384-L399
+ $setup(WDATA, posedge WCLK &&& WE && WCLKE, 161);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L400
+ $setup(WE, posedge WCLK, 133);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L401
+ (posedge RCLKN => (RDATA : 16'bx)) = 2146;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L343-L358
+ $setup(MASK, posedge WCLK &&& WE && WCLKE, 403);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L359-L369
+ $setup(RADDR, posedge RCLKN &&& RE && RCLKE, 300);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L370
+ $setup(RCLKE, posedge RCLKN, 393);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L371
+ $setup(RE, posedge RCLKN, 145);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L372-L382
+ $setup(WADDR, posedge WCLK &&& WE && WCLKE, 331);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L383
+ $setup(WCLKE, posedge WCLK, 393);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L384-L399
+ $setup(WDATA, posedge WCLK &&& WE && WCLKE, 238);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L400
+ $setup(WE, posedge WCLK, 196);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L401
+ (posedge RCLKN => (RDATA : 16'bx)) = 3163;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12968-12983
+ $setup(MASK, posedge WCLK &&& WE && WCLKE, 517);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12984-12994
+ $setup(RADDR, posedge RCLKN &&& RE && RCLKE, 384);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12995
+ $setup(RCLKE, posedge RCLKN, 503);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12996
+ $setup(RE, posedge RCLKN, 185);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12997-13007
+ $setup(WADDR, posedge WCLK &&& WE && WCLKE, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13008
+ $setup(WCLKE, posedge WCLK, 503);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13009-13024
+ $setup(WDATA, posedge WCLK &&& WE && WCLKE, 305);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13025
+ $setup(WE, posedge WCLK, 252);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13026
+ (posedge RCLKN => (RDATA : 16'bx)) = 1179;
+ endspecify
+`endif
endmodule
module SB_RAM40_4KNW (
- `ABC9_ARRIVAL_HX(2146) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L401
- `ABC9_ARRIVAL_LP(3163) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L401
- `ABC9_ARRIVAL_U(1179) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13026
output [15:0] RDATA,
input RCLK, RCLKE, RE,
input [10:0] RADDR,
@@ -774,12 +1663,75 @@ module SB_RAM40_4KNW (
.MASK (MASK ),
.WDATA(WDATA)
);
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L343-L358
+ $setup(MASK, posedge WCLKN &&& WE && WCLKE, 274);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L359-L369
+ $setup(RADDR, posedge RCLK &&& RE && RCLKE, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L370
+ $setup(RCLKE, posedge RCLK, 267);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L371
+ $setup(RE, posedge RCLK, 98);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L372-L382
+ $setup(WADDR, posedge WCLKN &&& WE && WCLKE, 224);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L383
+ $setup(WCLKE, posedge WCLKN, 267);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L384-L399
+ $setup(WDATA, posedge WCLKN &&& WE && WCLKE, 161);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L400
+ $setup(WE, posedge WCLKN, 133);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L401
+ (posedge RCLK => (RDATA : 16'bx)) = 2146;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L343-L358
+ $setup(MASK, posedge WCLKN &&& WE && WCLKE, 403);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L359-L369
+ $setup(RADDR, posedge RCLK &&& RE && RCLKE, 300);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L370
+ $setup(RCLKE, posedge RCLK, 393);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L371
+ $setup(RE, posedge RCLK, 145);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L372-L382
+ $setup(WADDR, posedge WCLKN &&& WE && WCLKE, 331);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L383
+ $setup(WCLKE, posedge WCLKN, 393);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L384-L399
+ $setup(WDATA, posedge WCLKN &&& WE && WCLKE, 238);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L400
+ $setup(WE, posedge WCLKN, 196);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L401
+ (posedge RCLK => (RDATA : 16'bx)) = 3163;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12968-12983
+ $setup(MASK, posedge WCLKN &&& WE && WCLKE, 517);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12984-12994
+ $setup(RADDR, posedge RCLK &&& RE && RCLKE, 384);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12995
+ $setup(RCLKE, posedge RCLK, 503);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12996
+ $setup(RE, posedge RCLK, 185);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12997-13007
+ $setup(WADDR, posedge WCLKN &&& WE && WCLKE, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13008
+ $setup(WCLKE, posedge WCLKN, 503);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13009-13024
+ $setup(WDATA, posedge WCLKN &&& WE && WCLKE, 305);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13025
+ $setup(WE, posedge WCLKN, 252);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13026
+ (posedge RCLK => (RDATA : 16'bx)) = 1179;
+ endspecify
+`endif
endmodule
module SB_RAM40_4KNRNW (
- `ABC9_ARRIVAL_HX(2146) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L401
- `ABC9_ARRIVAL_LP(3163) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L401
- `ABC9_ARRIVAL_U(1179) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13026
output [15:0] RDATA,
input RCLKN, RCLKE, RE,
input [10:0] RADDR,
@@ -842,6 +1794,72 @@ module SB_RAM40_4KNRNW (
.MASK (MASK ),
.WDATA(WDATA)
);
+`ifdef ICE40_HX
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L343-L358
+ $setup(MASK, posedge WCLKN &&& WE && WCLKE, 274);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L359-L369
+ $setup(RADDR, posedge RCLKN &&& RE && RCLKE, 203);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L370
+ $setup(RCLKE, posedge RCLKN, 267);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L371
+ $setup(RE, posedge RCLKN, 98);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L372-L382
+ $setup(WADDR, posedge WCLKN &&& WE && WCLKE, 224);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L383
+ $setup(WCLKE, posedge WCLKN, 267);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L384-L399
+ $setup(WDATA, posedge WCLKN &&& WE && WCLKE, 161);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L400
+ $setup(WE, posedge WCLKN, 133);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L401
+ (posedge RCLKN => (RDATA : 16'bx)) = 2146;
+ endspecify
+`endif
+`ifdef ICE40_LP
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L343-L358
+ $setup(MASK, posedge WCLKN &&& WE && WCLKE, 403);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L359-L369
+ $setup(RADDR, posedge RCLKN &&& RE && RCLKE, 300);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L370
+ $setup(RCLKE, posedge RCLKN, 393);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L371
+ $setup(RE, posedge RCLKN, 145);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L372-L382
+ $setup(WADDR, posedge WCLKN &&& WE && WCLKE, 331);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L383
+ $setup(WCLKE, posedge WCLKN, 393);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L384-L399
+ $setup(WDATA, posedge WCLKN &&& WE && WCLKE, 238);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L400
+ $setup(WE, posedge WCLKN, 196);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L401
+ (posedge RCLKN => (RDATA : 16'bx)) = 3163;
+ endspecify
+`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12968-12983
+ $setup(MASK, posedge WCLKN &&& WE && WCLKE, 517);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12984-12994
+ $setup(RADDR, posedge RCLKN &&& RE && RCLKE, 384);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12995
+ $setup(RCLKE, posedge RCLKN, 503);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12996
+ $setup(RE, posedge RCLKN, 185);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L12997-13007
+ $setup(WADDR, posedge WCLKN &&& WE && WCLKE, 424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13008
+ $setup(WCLKE, posedge WCLKN, 503);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13009-13024
+ $setup(WDATA, posedge WCLKN &&& WE && WCLKE, 305);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13025
+ $setup(WE, posedge WCLKN, 252);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13026
+ (posedge RCLKN => (RDATA : 16'bx)) = 1179;
+ endspecify
+`endif
endmodule
// Packed IceStorm Logic Cells
@@ -849,9 +1867,6 @@ endmodule
module ICESTORM_LC (
input I0, I1, I2, I3, CIN, CLK, CEN, SR,
output LO,
- `ABC9_ARRIVAL_HX(540)
- `ABC9_ARRIVAL_LP(796)
- `ABC9_ARRIVAL_U(1391)
output O,
output COUT
);
@@ -941,6 +1956,198 @@ specify
$setuphold(negedge CLK, negedge SR, 0:0:0, 0:0:0);
endspecify
`endif
+`ifdef ICE40_HX
+specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L79
+ (CIN => COUT) = (101:112:126, 85:94:105);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L80
+ (I0 => O) = (361:399:449, 310:343:386);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L81
+ (I0 => LO) = (293:324:365, 310:343:386);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L82
+ (I1 => COUT) = (209:231:259, 197:218:245);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L83
+ (I1 => O) = (321:355:400, 304:337:379);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L84
+ (I1 => LO) = (259:287:323, 304:337:379);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L85
+ (I2 => COUT) = (186:206:231, 107:118:133);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L86
+ (I2 => O) = (304:337:379, 282:312:351);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L87
+ (I2 => LO) = (254:281:316, 231:256:288);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L88
+ (I3 => O) = (254:281:316, 231:256:288);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L89
+ (I3 => LO) = (214:237:267, 220:243:274);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L90
+ (posedge CLK => (O : 1'bx)) = (434:480:540, 434:480:540);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L91-L92
+ (SR => O) = (482:535:599, 482:533:599);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L74
+ $setuphold(posedge CLK, posedge I0, 378:418:470, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L68
+ $setuphold(posedge CLK, negedge I0, 321:355:400, 0:0:0);
+ $setuphold(negedge CLK, posedge I0, 378:418:470, 0:0:0);
+ $setuphold(negedge CLK, negedge I0, 321:355:400, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L75
+ $setuphold(posedge CLK, posedge I1, 321:355:400, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L69
+ $setuphold(posedge CLK, negedge I1, 304:337:379, 0:0:0);
+ $setuphold(negedge CLK, posedge I1, 321:355:400, 0:0:0);
+ $setuphold(negedge CLK, negedge I1, 304:337:379, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L76
+ $setuphold(posedge CLK, posedge I2, 299:330:372, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L70
+ $setuphold(posedge CLK, negedge I2, 259:287:323, 0:0:0);
+ $setuphold(negedge CLK, posedge I2, 299:330:372, 0:0:0);
+ $setuphold(negedge CLK, negedge I2, 259:287:323, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L77
+ $setuphold(posedge CLK, posedge I3, 220:243:274, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L71
+ $setuphold(posedge CLK, negedge I3, 175:183:217, 0:0:0);
+ $setuphold(negedge CLK, posedge I3, 220:243:274, 0:0:0);
+ $setuphold(negedge CLK, negedge I3, 175:183:217, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L73
+ $setuphold(posedge CLK, negedge CEN, 0:0:0, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L67
+ $setuphold(posedge CLK, posedge CEN, 0:0:0, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L78
+ $setuphold(posedge CLK, posedge SR, 163:181:203, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_hx1k.txt#L72
+ $setuphold(posedge CLK, negedge SR, 113:125:140, 0:0:0);
+ $setuphold(negedge CLK, posedge SR, 163:181:203, 0:0:0);
+ $setuphold(negedge CLK, negedge SR, 113:125:140, 0:0:0);
+endspecify
+`endif
+`ifdef ICE40_LP
+specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L79
+ (CIN => COUT) = (118:153:186, 98:128:155);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L80
+ (I0 => O) = (419:545:662, 360:468:569);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L81
+ (I0 => LO) = (340:442:538, 360:468:569);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L82
+ (I1 => COUT) = (242:315:382, 229:298:362);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L83
+ (I1 => O) = (372:485:589, 353:459:558);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L84
+ (I1 => LO) = (301:391:475, 353:459:558);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L85
+ (I2 => COUT) = (216:281:341, 124:162:196);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L86
+ (I2 => O) = (353:459:558, 327:425:517);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L87
+ (I2 => LO) = (288:374:455, 321:417:507);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L88
+ (I3 => O) = (294:383:465, 268:349:424);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L89
+ (I3 => LO) = (249:323:393, 255:332:403);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
+ (posedge CLK => (O : 1'bx)) = (504:655:796, 504:655:796);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L91-L92
+ (SR => O) = (559:726:883, 559:726:883);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
+ $setuphold(posedge CLK, posedge I0, 438:570:693, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L68
+ $setuphold(posedge CLK, negedge I0, 373:485:589, 0:0:0);
+ $setuphold(negedge CLK, posedge I0, 438:570:693, 0:0:0);
+ $setuphold(negedge CLK, negedge I0, 373:485:589, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L75
+ $setuphold(posedge CLK, posedge I1, 373:485:589, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L69
+ $setuphold(posedge CLK, negedge I1, 353:459:558, 0:0:0);
+ $setuphold(negedge CLK, posedge I1, 373:485:589, 0:0:0);
+ $setuphold(negedge CLK, negedge I1, 353:459:558, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L76
+ $setuphold(posedge CLK, posedge I2, 347:451:548, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L70
+ $setuphold(posedge CLK, negedge I2, 301:391:475, 0:0:0);
+ $setuphold(negedge CLK, posedge I2, 347:451:548, 0:0:0);
+ $setuphold(negedge CLK, negedge I2, 301:391:475, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L77
+ $setuphold(posedge CLK, posedge I3, 255:332:403, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L71
+ $setuphold(posedge CLK, negedge I3, 203:264:320, 0:0:0);
+ $setuphold(negedge CLK, posedge I3, 255:332:403, 0:0:0);
+ $setuphold(negedge CLK, negedge I3, 203:264:320, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L73
+ $setuphold(posedge CLK, negedge CEN, 0:0:0, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L67
+ $setuphold(posedge CLK, posedge CEN, 0:0:0, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L78
+ $setuphold(posedge CLK, posedge SR, 190:247:300, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L72
+ $setuphold(posedge CLK, negedge SR, 131:170:207, 0:0:0);
+ $setuphold(negedge CLK, posedge SR, 190:247:300, 0:0:0);
+ $setuphold(negedge CLK, negedge SR, 131:170:207, 0:0:0);
+endspecify
+`endif
+`ifdef ICE40_U
+specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L91
+ (CIN => COUT) = (103:181:278, 103:181:278);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L92
+ (I0 => O) = (462:808:1255, 477:834:1285);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L93
+ (I0 => LO) = (315:550:848, 334:585:901);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L94
+ (I1 => COUT) = (251:438:675, 246:430:662);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L95
+ (I1 => O) = (438:765:1179, 457:799:1232);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L96
+ (I1 => LO) = (275:481:742, 329:576:887);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L97
+ (I2 => COUT) = (226:395:609, 133:232:358);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L98
+ (I2 => O) = (438:765:1179, 447:782:1205);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L99
+ (I2 => LO) = (261:456:702, 290:507:781);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L100
+ (I3 => O) = (320:559:861, 226:370:874);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L101
+ (I3 => LO) = (216:378:583, 226:395:609);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
+ (posedge CLK => (O : 1'bx)) = (516:903:1391, 516:903:1391);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L103-104
+ (SR => O) = (420:734:1131, 590:1032:1589);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
+ $setuphold(posedge CLK, posedge I0, 457:799:1232, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L80
+ $setuphold(posedge CLK, negedge I0, 393:688:1060, 0:0:0);
+ $setuphold(negedge CLK, posedge I0, 457:799:1232, 0:0:0);
+ $setuphold(negedge CLK, negedge I0, 393:688:1060, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L87
+ $setuphold(posedge CLK, posedge I1, 393:688:1060, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L81
+ $setuphold(posedge CLK, negedge I1, 373:653:1007, 0:0:0);
+ $setuphold(negedge CLK, posedge I1, 393:688:1060, 0:0:0);
+ $setuphold(negedge CLK, negedge I1, 373:653:1007, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L88
+ $setuphold(posedge CLK, posedge I2, 364:636:980, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L82
+ $setuphold(posedge CLK, negedge I2, 320:559:861, 0:0:0);
+ $setuphold(negedge CLK, posedge I2, 364:636:980, 0:0:0);
+ $setuphold(negedge CLK, negedge I2, 320:559:861, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L89
+ $setuphold(posedge CLK, posedge I3, 279:473:728, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L83
+ $setuphold(posedge CLK, negedge I3, 216:378:583, 0:0:0);
+ $setuphold(negedge CLK, posedge I3, 279:473:728, 0:0:0);
+ $setuphold(negedge CLK, negedge I3, 216:378:583, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L85
+ $setuphold(posedge CLK, negedge CEN, 0:0:0, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L79
+ $setuphold(posedge CLK, posedge CEN, 0:0:0, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L90
+ $setuphold(posedge CLK, posedge SR, 197:344:530, 0:0:0);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L84
+ $setuphold(posedge CLK, negedge SR, 143:249:384, 0:0:0);
+ $setuphold(negedge CLK, posedge SR, 197:344:530, 0:0:0);
+ $setuphold(negedge CLK, negedge SR, 131:170:207, 0:0:0);
+endspecify
+`endif
endmodule
// SiliconBlue PLL Cells
@@ -1126,7 +2333,6 @@ module SB_SPRAM256KA (
input [15:0] DATAIN,
input [3:0] MASKWREN,
input WREN, CHIPSELECT, CLOCK, STANDBY, SLEEP, POWEROFF,
- `ABC9_ARRIVAL_U(1821) // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13207
output reg [15:0] DATAOUT
);
`ifndef BLACKBOX
@@ -1144,20 +2350,45 @@ module SB_SPRAM256KA (
if (off) begin
DATAOUT <= 0;
end else
- if (CHIPSELECT && !STANDBY && !WREN) begin
- DATAOUT <= mem[ADDRESS];
- end else begin
- if (CHIPSELECT && !STANDBY && WREN) begin
+ if (STANDBY) begin
+ DATAOUT <= 'bx;
+ end else
+ if (CHIPSELECT) begin
+ if (!WREN) begin
+ DATAOUT <= mem[ADDRESS];
+ end else begin
if (MASKWREN[0]) mem[ADDRESS][ 3: 0] = DATAIN[ 3: 0];
if (MASKWREN[1]) mem[ADDRESS][ 7: 4] = DATAIN[ 7: 4];
if (MASKWREN[2]) mem[ADDRESS][11: 8] = DATAIN[11: 8];
if (MASKWREN[3]) mem[ADDRESS][15:12] = DATAIN[15:12];
+ DATAOUT <= 'bx;
end
- DATAOUT <= 'bx;
end
end
`endif
`endif
+`ifdef ICE40_U
+ specify
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13169-L13182
+ $setup(posedge ADDRESS, posedge CLOCK, 268);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13183
+ $setup(CHIPSELECT, posedge CLOCK, 404);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13184-L13199
+ $setup(DATAIN, posedge CLOCK, 143);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13200-L13203
+ $setup(MASKWREN, posedge CLOCK, 143);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13167
+ //$setup(negedge SLEEP, posedge CLOCK, 41505);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13167
+ //$setup(negedge STANDBY, posedge CLOCK, 1715);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13206
+ $setup(WREN, posedge CLOCK, 289);
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13207-L13222
+ (posedge CLOCK => (DATAOUT : 16'bx)) = 1821;
+ // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13223-L13238
+ (posedge SLEEP => (DATAOUT : 16'b0)) = 1099;
+ endspecify
+`endif
endmodule
(* blackbox *)
diff --git a/techlibs/ice40/ice40_braminit.cc b/techlibs/ice40/ice40_braminit.cc
index 1a139ffea..936c189ea 100644
--- a/techlibs/ice40/ice40_braminit.cc
+++ b/techlibs/ice40/ice40_braminit.cc
@@ -33,15 +33,15 @@ static void run_ice40_braminit(Module *module)
uint16_t mem[256];
/* Only consider cells we're interested in */
- if (cell->type != "\\SB_RAM40_4K" &&
- cell->type != "\\SB_RAM40_4KNR" &&
- cell->type != "\\SB_RAM40_4KNW" &&
- cell->type != "\\SB_RAM40_4KNRNW")
+ if (cell->type != ID(SB_RAM40_4K) &&
+ cell->type != ID(SB_RAM40_4KNR) &&
+ cell->type != ID(SB_RAM40_4KNW) &&
+ cell->type != ID(SB_RAM40_4KNRNW))
continue;
- if (!cell->hasParam("\\INIT_FILE"))
+ if (!cell->hasParam(ID(INIT_FILE)))
continue;
- std::string init_file = cell->getParam("\\INIT_FILE").decode_string();
- cell->unsetParam("\\INIT_FILE");
+ std::string init_file = cell->getParam(ID(INIT_FILE)).decode_string();
+ cell->unsetParam(ID(INIT_FILE));
if (init_file == "")
continue;
diff --git a/techlibs/ice40/ice40_ffinit.cc b/techlibs/ice40/ice40_ffinit.cc
index c098736e9..d7715135e 100644
--- a/techlibs/ice40/ice40_ffinit.cc
+++ b/techlibs/ice40/ice40_ffinit.cc
@@ -62,11 +62,11 @@ struct Ice40FfinitPass : public Pass {
for (auto wire : module->selected_wires())
{
- if (wire->attributes.count("\\init") == 0)
+ if (wire->attributes.count(ID::init) == 0)
continue;
SigSpec wirebits = sigmap(wire);
- Const initval = wire->attributes.at("\\init");
+ Const initval = wire->attributes.at(ID::init);
init_wires.insert(wire);
for (int i = 0; i < GetSize(wirebits) && i < GetSize(initval); i++)
@@ -93,9 +93,9 @@ struct Ice40FfinitPass : public Pass {
}
pool<IdString> sb_dff_types = {
- "\\SB_DFF", "\\SB_DFFE", "\\SB_DFFSR", "\\SB_DFFR", "\\SB_DFFSS", "\\SB_DFFS", "\\SB_DFFESR",
- "\\SB_DFFER", "\\SB_DFFESS", "\\SB_DFFES", "\\SB_DFFN", "\\SB_DFFNE", "\\SB_DFFNSR", "\\SB_DFFNR",
- "\\SB_DFFNSS", "\\SB_DFFNS", "\\SB_DFFNESR", "\\SB_DFFNER", "\\SB_DFFNESS", "\\SB_DFFNES"
+ ID(SB_DFF), ID(SB_DFFE), ID(SB_DFFSR), ID(SB_DFFR), ID(SB_DFFSS), ID(SB_DFFS), ID(SB_DFFESR),
+ ID(SB_DFFER), ID(SB_DFFESS), ID(SB_DFFES), ID(SB_DFFN), ID(SB_DFFNE), ID(SB_DFFNSR), ID(SB_DFFNR),
+ ID(SB_DFFNSS), ID(SB_DFFNS), ID(SB_DFFNESR), ID(SB_DFFNER), ID(SB_DFFNESS), ID(SB_DFFNES)
};
for (auto cell : module->selected_cells())
@@ -103,8 +103,8 @@ struct Ice40FfinitPass : public Pass {
if (!sb_dff_types.count(cell->type))
continue;
- SigSpec sig_d = cell->getPort("\\D");
- SigSpec sig_q = cell->getPort("\\Q");
+ SigSpec sig_d = cell->getPort(ID::D);
+ SigSpec sig_q = cell->getPort(ID::Q);
if (GetSize(sig_d) < 1 || GetSize(sig_q) < 1)
continue;
@@ -133,14 +133,14 @@ struct Ice40FfinitPass : public Pass {
if (type_str.back() == 'S') {
type_str.back() = 'R';
cell->type = type_str;
- cell->setPort("\\R", cell->getPort("\\S"));
- cell->unsetPort("\\S");
+ cell->setPort(ID::R, cell->getPort(ID::S));
+ cell->unsetPort(ID::S);
} else
if (type_str.back() == 'R') {
type_str.back() = 'S';
cell->type = type_str;
- cell->setPort("\\S", cell->getPort("\\R"));
- cell->unsetPort("\\R");
+ cell->setPort(ID::S, cell->getPort(ID::R));
+ cell->unsetPort(ID::R);
}
Wire *new_bit_d = module->addWire(NEW_ID);
@@ -149,17 +149,17 @@ struct Ice40FfinitPass : public Pass {
module->addNotGate(NEW_ID, bit_d, new_bit_d);
module->addNotGate(NEW_ID, new_bit_q, bit_q);
- cell->setPort("\\D", new_bit_d);
- cell->setPort("\\Q", new_bit_q);
+ cell->setPort(ID::D, new_bit_d);
+ cell->setPort(ID::Q, new_bit_q);
}
for (auto wire : init_wires)
{
- if (wire->attributes.count("\\init") == 0)
+ if (wire->attributes.count(ID::init) == 0)
continue;
SigSpec wirebits = sigmap(wire);
- Const &initval = wire->attributes.at("\\init");
+ Const &initval = wire->attributes.at(ID::init);
bool remove_attribute = true;
for (int i = 0; i < GetSize(wirebits) && i < GetSize(initval); i++) {
@@ -170,7 +170,7 @@ struct Ice40FfinitPass : public Pass {
}
if (remove_attribute)
- wire->attributes.erase("\\init");
+ wire->attributes.erase(ID::init);
}
}
}
diff --git a/techlibs/ice40/ice40_ffssr.cc b/techlibs/ice40/ice40_ffssr.cc
index a7649d7a0..ffb8c74b1 100644
--- a/techlibs/ice40/ice40_ffssr.cc
+++ b/techlibs/ice40/ice40_ffssr.cc
@@ -49,10 +49,10 @@ struct Ice40FfssrPass : public Pass {
extra_args(args, argidx, design);
pool<IdString> sb_dff_types;
- sb_dff_types.insert("\\SB_DFF");
- sb_dff_types.insert("\\SB_DFFE");
- sb_dff_types.insert("\\SB_DFFN");
- sb_dff_types.insert("\\SB_DFFNE");
+ sb_dff_types.insert(ID(SB_DFF));
+ sb_dff_types.insert(ID(SB_DFFE));
+ sb_dff_types.insert(ID(SB_DFFN));
+ sb_dff_types.insert(ID(SB_DFFNE));
for (auto module : design->selected_modules())
{
@@ -69,22 +69,22 @@ struct Ice40FfssrPass : public Pass {
continue;
}
- if (cell->type != "$_MUX_")
+ if (cell->type != ID($_MUX_))
continue;
- SigBit bit_a = sigmap(cell->getPort("\\A"));
- SigBit bit_b = sigmap(cell->getPort("\\B"));
+ SigBit bit_a = sigmap(cell->getPort(ID::A));
+ SigBit bit_b = sigmap(cell->getPort(ID::B));
if (bit_a.wire == nullptr || bit_b.wire == nullptr)
- sr_muxes[sigmap(cell->getPort("\\Y"))] = cell;
+ sr_muxes[sigmap(cell->getPort(ID::Y))] = cell;
}
for (auto cell : ff_cells)
{
- if (cell->get_bool_attribute("\\dont_touch"))
+ if (cell->get_bool_attribute(ID(dont_touch)))
continue;
- SigSpec sig_d = cell->getPort("\\D");
+ SigSpec sig_d = cell->getPort(ID::D);
if (GetSize(sig_d) < 1)
continue;
@@ -95,9 +95,9 @@ struct Ice40FfssrPass : public Pass {
continue;
Cell *mux_cell = sr_muxes.at(bit_d);
- SigBit bit_a = sigmap(mux_cell->getPort("\\A"));
- SigBit bit_b = sigmap(mux_cell->getPort("\\B"));
- SigBit bit_s = sigmap(mux_cell->getPort("\\S"));
+ SigBit bit_a = sigmap(mux_cell->getPort(ID::A));
+ SigBit bit_b = sigmap(mux_cell->getPort(ID::B));
+ SigBit bit_s = sigmap(mux_cell->getPort(ID::S));
log(" Merging %s (A=%s, B=%s, S=%s) into %s (%s).\n", log_id(mux_cell),
log_signal(bit_a), log_signal(bit_b), log_signal(bit_s), log_id(cell), log_id(cell->type));
@@ -116,12 +116,12 @@ struct Ice40FfssrPass : public Pass {
if (sr_val == State::S1) {
cell->type = cell->type.str() + "SS";
- cell->setPort("\\S", sr_sig);
- cell->setPort("\\D", bit_d);
+ cell->setPort(ID::S, sr_sig);
+ cell->setPort(ID::D, bit_d);
} else {
cell->type = cell->type.str() + "SR";
- cell->setPort("\\R", sr_sig);
- cell->setPort("\\D", bit_d);
+ cell->setPort(ID::R, sr_sig);
+ cell->setPort(ID::D, bit_d);
}
}
}
diff --git a/techlibs/ice40/ice40_opt.cc b/techlibs/ice40/ice40_opt.cc
index 925ab31bb..18c1a58cf 100644
--- a/techlibs/ice40/ice40_opt.cc
+++ b/techlibs/ice40/ice40_opt.cc
@@ -41,26 +41,26 @@ static void run_ice40_opts(Module *module)
for (auto cell : module->selected_cells())
{
- if (!cell->type.in("\\SB_LUT4", "\\SB_CARRY", "$__ICE40_CARRY_WRAPPER"))
+ if (!cell->type.in(ID(SB_LUT4), ID(SB_CARRY), ID($__ICE40_CARRY_WRAPPER)))
continue;
if (cell->has_keep_attr())
continue;
- if (cell->type == "\\SB_LUT4")
+ if (cell->type == ID(SB_LUT4))
{
sb_lut_cells.push_back(cell);
continue;
}
- if (cell->type == "\\SB_CARRY")
+ if (cell->type == ID(SB_CARRY))
{
SigSpec non_const_inputs, replacement_output;
int count_zeros = 0, count_ones = 0;
SigBit inbit[3] = {
- get_bit_or_zero(cell->getPort("\\I0")),
- get_bit_or_zero(cell->getPort("\\I1")),
- get_bit_or_zero(cell->getPort("\\CI"))
+ get_bit_or_zero(cell->getPort(ID(I0))),
+ get_bit_or_zero(cell->getPort(ID(I1))),
+ get_bit_or_zero(cell->getPort(ID::CI))
};
for (int i = 0; i < 3; i++)
if (inbit[i].wire == nullptr) {
@@ -79,8 +79,8 @@ static void run_ice40_opts(Module *module)
replacement_output = non_const_inputs;
if (GetSize(replacement_output)) {
- optimized_co.insert(sigmap(cell->getPort("\\CO")[0]));
- module->connect(cell->getPort("\\CO")[0], replacement_output);
+ optimized_co.insert(sigmap(cell->getPort(ID::CO)[0]));
+ module->connect(cell->getPort(ID::CO)[0], replacement_output);
module->design->scratchpad_set_bool("opt.did_something", true);
log("Optimized away SB_CARRY cell %s.%s: CO=%s\n",
log_id(module), log_id(cell), log_signal(replacement_output));
@@ -89,15 +89,15 @@ static void run_ice40_opts(Module *module)
continue;
}
- if (cell->type == "$__ICE40_CARRY_WRAPPER")
+ if (cell->type == ID($__ICE40_CARRY_WRAPPER))
{
SigSpec non_const_inputs, replacement_output;
int count_zeros = 0, count_ones = 0;
SigBit inbit[3] = {
- cell->getPort("\\A"),
- cell->getPort("\\B"),
- cell->getPort("\\CI")
+ cell->getPort(ID::A),
+ cell->getPort(ID::B),
+ cell->getPort(ID::CI)
};
for (int i = 0; i < 3; i++)
if (inbit[i].wire == nullptr) {
@@ -116,7 +116,7 @@ static void run_ice40_opts(Module *module)
replacement_output = non_const_inputs;
if (GetSize(replacement_output)) {
- optimized_co.insert(sigmap(cell->getPort("\\CO")[0]));
+ optimized_co.insert(sigmap(cell->getPort(ID::CO)[0]));
auto it = cell->attributes.find(ID(SB_LUT4.name));
if (it != cell->attributes.end()) {
module->rename(cell, it->second.decode_string());
@@ -124,9 +124,9 @@ static void run_ice40_opts(Module *module)
for (const auto &a : cell->attributes)
if (a.first.begins_with("\\SB_LUT4.\\"))
new_attr[a.first.c_str() + strlen("\\SB_LUT4.")] = a.second;
- else if (a.first == ID(src))
+ else if (a.first == ID::src)
new_attr.insert(std::make_pair(a.first, a.second));
- else if (a.first.in(ID(SB_LUT4.name), ID::keep, ID(module_not_derived)))
+ else if (a.first.in(ID(SB_LUT4.name), ID::keep, ID::module_not_derived))
continue;
else if (a.first.begins_with("\\SB_CARRY.\\"))
continue;
@@ -134,22 +134,22 @@ static void run_ice40_opts(Module *module)
log_abort();
cell->attributes = std::move(new_attr);
}
- module->connect(cell->getPort("\\CO")[0], replacement_output);
+ module->connect(cell->getPort(ID::CO)[0], replacement_output);
module->design->scratchpad_set_bool("opt.did_something", true);
log("Optimized $__ICE40_CARRY_WRAPPER cell back to logic (without SB_CARRY) %s.%s: CO=%s\n",
log_id(module), log_id(cell), log_signal(replacement_output));
- cell->type = "$lut";
- auto I3 = get_bit_or_zero(cell->getPort(cell->getParam(ID(I3_IS_CI)).as_bool() ? ID(CI) : ID(I3)));
- cell->setPort("\\A", { I3, inbit[1], inbit[0], get_bit_or_zero(cell->getPort("\\I0")) });
- cell->setPort("\\Y", cell->getPort("\\O"));
- cell->unsetPort("\\B");
- cell->unsetPort("\\CI");
- cell->unsetPort("\\I0");
- cell->unsetPort("\\I3");
- cell->unsetPort("\\CO");
- cell->unsetPort("\\O");
- cell->setParam("\\WIDTH", 4);
- cell->unsetParam("\\I3_IS_CI");
+ cell->type = ID($lut);
+ auto I3 = get_bit_or_zero(cell->getPort(cell->getParam(ID(I3_IS_CI)).as_bool() ? ID::CI : ID(I3)));
+ cell->setPort(ID::A, { I3, inbit[1], inbit[0], get_bit_or_zero(cell->getPort(ID(I0))) });
+ cell->setPort(ID::Y, cell->getPort(ID::O));
+ cell->unsetPort(ID::B);
+ cell->unsetPort(ID::CI);
+ cell->unsetPort(ID(I0));
+ cell->unsetPort(ID(I3));
+ cell->unsetPort(ID::CO);
+ cell->unsetPort(ID::O);
+ cell->setParam(ID::WIDTH, 4);
+ cell->unsetParam(ID(I3_IS_CI));
}
continue;
}
@@ -159,10 +159,10 @@ static void run_ice40_opts(Module *module)
{
SigSpec inbits;
- inbits.append(get_bit_or_zero(cell->getPort("\\I0")));
- inbits.append(get_bit_or_zero(cell->getPort("\\I1")));
- inbits.append(get_bit_or_zero(cell->getPort("\\I2")));
- inbits.append(get_bit_or_zero(cell->getPort("\\I3")));
+ inbits.append(get_bit_or_zero(cell->getPort(ID(I0))));
+ inbits.append(get_bit_or_zero(cell->getPort(ID(I1))));
+ inbits.append(get_bit_or_zero(cell->getPort(ID(I2))));
+ inbits.append(get_bit_or_zero(cell->getPort(ID(I3))));
sigmap.apply(inbits);
if (optimized_co.count(inbits[0])) goto remap_lut;
@@ -177,23 +177,23 @@ static void run_ice40_opts(Module *module)
module->design->scratchpad_set_bool("opt.did_something", true);
log("Mapping SB_LUT4 cell %s.%s back to logic.\n", log_id(module), log_id(cell));
- cell->type ="$lut";
- cell->setParam("\\WIDTH", 4);
- cell->setParam("\\LUT", cell->getParam("\\LUT_INIT"));
- cell->unsetParam("\\LUT_INIT");
+ cell->type = ID($lut);
+ cell->setParam(ID::WIDTH, 4);
+ cell->setParam(ID::LUT, cell->getParam(ID(LUT_INIT)));
+ cell->unsetParam(ID(LUT_INIT));
- cell->setPort("\\A", SigSpec({
- get_bit_or_zero(cell->getPort("\\I3")),
- get_bit_or_zero(cell->getPort("\\I2")),
- get_bit_or_zero(cell->getPort("\\I1")),
- get_bit_or_zero(cell->getPort("\\I0"))
+ cell->setPort(ID::A, SigSpec({
+ get_bit_or_zero(cell->getPort(ID(I3))),
+ get_bit_or_zero(cell->getPort(ID(I2))),
+ get_bit_or_zero(cell->getPort(ID(I1))),
+ get_bit_or_zero(cell->getPort(ID(I0)))
}));
- cell->setPort("\\Y", cell->getPort("\\O")[0]);
- cell->unsetPort("\\I0");
- cell->unsetPort("\\I1");
- cell->unsetPort("\\I2");
- cell->unsetPort("\\I3");
- cell->unsetPort("\\O");
+ cell->setPort(ID::Y, cell->getPort(ID::O)[0]);
+ cell->unsetPort(ID(I0));
+ cell->unsetPort(ID(I1));
+ cell->unsetPort(ID(I2));
+ cell->unsetPort(ID(I3));
+ cell->unsetPort(ID::O);
cell->check();
simplemap_lut(module, cell);
diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc
index 22cac7d7d..463e80ee2 100644
--- a/techlibs/ice40/synth_ice40.cc
+++ b/techlibs/ice40/synth_ice40.cc
@@ -96,6 +96,9 @@ struct SynthIce40Pass : public ScriptPass
log(" -abc9\n");
log(" use new ABC9 flow (EXPERIMENTAL)\n");
log("\n");
+ log(" -flowmap\n");
+ log(" use FlowMap LUT techmapping instead of abc (EXPERIMENTAL)\n");
+ log("\n");
log("\n");
log("The following commands are executed by this synthesis command:\n");
help_script();
@@ -103,7 +106,7 @@ struct SynthIce40Pass : public ScriptPass
}
string top_opt, blif_file, edif_file, json_file, device_opt;
- bool nocarry, nodffe, nobram, dsp, flatten, retime, noabc, abc2, vpr, abc9;
+ bool nocarry, nodffe, nobram, dsp, flatten, retime, noabc, abc2, vpr, abc9, flowmap;
int min_ce_use;
void clear_flags() YS_OVERRIDE
@@ -123,6 +126,7 @@ struct SynthIce40Pass : public ScriptPass
abc2 = false;
vpr = false;
abc9 = false;
+ flowmap = false;
device_opt = "hx";
}
@@ -214,6 +218,10 @@ struct SynthIce40Pass : public ScriptPass
device_opt = args[++argidx];
continue;
}
+ if (args[argidx] == "-flowmap") {
+ flowmap = true;
+ continue;
+ }
break;
}
extra_args(args, argidx, design);
@@ -226,6 +234,13 @@ struct SynthIce40Pass : public ScriptPass
if (abc9 && retime)
log_cmd_error("-retime option not currently compatible with -abc9!\n");
+ if (abc9 && noabc)
+ log_cmd_error("-abc9 is incompatible with -noabc!\n");
+ if (abc9 && flowmap)
+ log_cmd_error("-abc9 is incompatible with -flowmap!\n");
+ if (flowmap && noabc)
+ log_cmd_error("-flowmap is incompatible with -noabc!\n");
+
log_header(design, "Executing SYNTH_ICE40 pass.\n");
log_push();
@@ -236,16 +251,16 @@ struct SynthIce40Pass : public ScriptPass
void script() YS_OVERRIDE
{
+ std::string define;
+ if (device_opt == "lp")
+ define = "-D ICE40_LP";
+ else if (device_opt == "u")
+ define = "-D ICE40_U";
+ else
+ define = "-D ICE40_HX";
if (check_label("begin"))
{
- std::string define;
- if (device_opt == "lp")
- define = "-D ICE40_LP";
- else if (device_opt == "u")
- define = "-D ICE40_U";
- else
- define = "-D ICE40_HX";
- run("read_verilog " + define + " -lib +/ice40/cells_sim.v");
+ run("read_verilog " + define + " -lib -specify +/ice40/cells_sim.v");
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
run("proc");
}
@@ -332,6 +347,7 @@ struct SynthIce40Pass : public ScriptPass
if (min_ce_use >= 0) {
run("opt_merge");
run(stringf("dff2dffe -unmap-mince %d", min_ce_use));
+ run("simplemap t:$dff");
}
run("techmap -D NO_LUT -D NO_ADDER -map +/ice40/cells_map.v");
run("opt_expr -mux_undef");
@@ -348,13 +364,16 @@ struct SynthIce40Pass : public ScriptPass
run("ice40_opt", "(only if -abc2)");
}
run("techmap -map +/ice40/latches_map.v");
- if (noabc || help_mode) {
- run("simplemap", " (only if -noabc)");
- run("techmap -map +/gate2lut.v -D LUT_WIDTH=4", "(only if -noabc)");
+ if (noabc || flowmap || help_mode) {
+ run("simplemap", " (if -noabc or -flowmap)");
+ if (noabc || help_mode)
+ run("techmap -map +/gate2lut.v -D LUT_WIDTH=4", "(only if -noabc)");
+ if (flowmap || help_mode)
+ run("flowmap -maxlut 4", "(only if -flowmap)");
}
if (!noabc) {
if (abc9) {
- run("read_verilog -icells -lib +/ice40/abc9_model.v");
+ run("read_verilog " + define + " -icells -lib -specify +/abc9_model.v +/ice40/abc9_model.v");
int wire_delay;
if (device_opt == "lp")
wire_delay = 400;
@@ -362,7 +381,7 @@ struct SynthIce40Pass : public ScriptPass
wire_delay = 750;
else
wire_delay = 250;
- run(stringf("abc9 -W %d -lut +/ice40/abc9_%s.lut -box +/ice40/abc9_%s.box", wire_delay, device_opt.c_str(), device_opt.c_str()));
+ run(stringf("abc9 -W %d", wire_delay));
}
else
run("abc -dress -lut 4", "(skip if -noabc)");
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-15 07:33:26 +0000