1 files changed, 28 insertions, 0 deletions
diff --git a/techlibs/xilinx/cells_xtra.v b/techlibs/xilinx/cells_xtra.v
index 3021f6b5a..9a246c308 100644
--- a/techlibs/xilinx/cells_xtra.v
+++ b/techlibs/xilinx/cells_xtra.v
@@ -5301,6 +5301,34 @@ module DSP48E2 (...);
     input RSTP;
 endmodule
 
+module FDDRCPE (...);
+    parameter INIT = 1'b0;
+    (* clkbuf_sink *)
+    input C0;
+    (* clkbuf_sink *)
+    input C1;
+    input CE;
+    input D0;
+    input D1;
+    input CLR;
+    input PRE;
+    output Q;
+endmodule
+
+module FDDRRSE (...);
+    parameter INIT = 1'b0;
+    output Q;
+    (* clkbuf_sink *)
+    input C0;
+    (* clkbuf_sink *)
+    input C1;
+    input CE;
+    input D0;
+    input D1;
+    input R;
+    input S;
+endmodule
+
 module IFDDRCPE (...);
     output Q0;
     output Q1;