diff options
Diffstat (limited to 'techlibs/xilinx/tests/bram2_tb.v')
| -rw-r--r-- | techlibs/xilinx/tests/bram2_tb.v | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/techlibs/xilinx/tests/bram2_tb.v b/techlibs/xilinx/tests/bram2_tb.v index 3a43b655d..0fe4137c6 100644 --- a/techlibs/xilinx/tests/bram2_tb.v +++ b/techlibs/xilinx/tests/bram2_tb.v @@ -3,12 +3,23 @@ module testbench; reg rd_clk; reg [ 7:0] rd_addr; - wire [15:0] rd_data; + wire [17:0] rd_data; wire wr_clk = 0; wire wr_enable = 0; wire [ 7:0] wr_addr = 0; - wire [15:0] wr_data = 0; + wire [17:0] wr_data = 0; + + function [17:0] hash(input [7:0] k); + reg [31:0] x; + begin + x = {k, ~k, k, ~k}; + x = x ^ (x << 13); + x = x ^ (x >> 17); + x = x ^ (x << 5); + hash = x; + end + endfunction myram uut ( .rd_clk (rd_clk ), @@ -34,8 +45,8 @@ module testbench; rd_addr <= rd_addr + 1; @(posedge rd_clk); // $display("%3d %3d", i, rd_data); - if (i != rd_data) begin - $display("[%1t] ERROR: addr=%3d, data=%3d", $time, i, rd_data); + if (hash(i) !== rd_data) begin + $display("[%1t] ERROR: addr=%3d, data_mem=%18b, data_ref=%18b", $time, i, rd_data, hash(i)); $stop; end end |