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-rw-r--r--tests/asicworld/code_tidbits_wire_example.v9
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diff --git a/tests/asicworld/code_tidbits_wire_example.v b/tests/asicworld/code_tidbits_wire_example.v
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+++ b/tests/asicworld/code_tidbits_wire_example.v
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+module wire_example( a, b, y);
+ input a, b;
+ output y;
+
+ wire a, b, y;
+
+ assign y = a & b;
+
+endmodule