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-rw-r--r--tests/simple/partsel.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/simple/partsel.v b/tests/simple/partsel.v
index acfc1ca5d..9b1a99859 100644
--- a/tests/simple/partsel.v
+++ b/tests/simple/partsel.v
@@ -1,4 +1,4 @@
-module test001(input [2:0] idx, input [31:0] data, output [3:0] slice_up, slice_down);
+module partsel_test001(input [2:0] idx, input [31:0] data, output [3:0] slice_up, slice_down);
wire [5:0] offset = idx << 2;
assign slice_up = data[offset +: 4];
assign slice_down = data[offset + 3 -: 4];