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Diffstat (limited to 'tests/techmap/shiftx2mux.ys')
| -rw-r--r-- | tests/techmap/shiftx2mux.ys | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/tests/techmap/shiftx2mux.ys b/tests/techmap/shiftx2mux.ys index c13b5f600..eb29680f6 100644 --- a/tests/techmap/shiftx2mux.ys +++ b/tests/techmap/shiftx2mux.ys @@ -108,3 +108,14 @@ design -import gate -as gate miter -equiv -flatten -make_assert -make_outputs gold gate miter sat -verify -prove-asserts -show-ports miter + +design -reset +read_verilog <<EOT +module top(input [6:0] A, input [1:0] B, output [1:0] Y); +wire [7:0] AA = {1'bx, A}; +assign Y = AA[B*2 +: 2]; +endmodule +EOT +opt +wreduce +equiv_opt techmap |