diff options
Diffstat (limited to 'tests/verilog/genfor_decl_no_init.ys')
| -rw-r--r-- | tests/verilog/genfor_decl_no_init.ys | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/tests/verilog/genfor_decl_no_init.ys b/tests/verilog/genfor_decl_no_init.ys new file mode 100644 index 000000000..348899195 --- /dev/null +++ b/tests/verilog/genfor_decl_no_init.ys @@ -0,0 +1,7 @@ +logger -expect error "Generate for loop variable declaration is missing initialization!" 1 +read_verilog -sv <<EOT +module top; + for (genvar i; i < 10; i = i + 1) + wire x; +endmodule +EOT |