diff options
Diffstat (limited to 'tests/xilinx/dffs.ys')
| -rw-r--r-- | tests/xilinx/dffs.ys | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/tests/xilinx/dffs.ys b/tests/xilinx/dffs.ys index 6a98994c0..2d48a816c 100644 --- a/tests/xilinx/dffs.ys +++ b/tests/xilinx/dffs.ys @@ -1,10 +1,25 @@ read_verilog dffs.v -hierarchy -top top +design -save read + proc -flatten +hierarchy -top dff equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx # equivalency check design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) -cd top # Constrain all select calls below inside the top module +cd dff # Constrain all select calls below inside the top module select -assert-count 1 t:BUFG -select -assert-count 2 t:FDRE +select -assert-count 1 t:FDRE + select -assert-none t:BUFG t:FDRE %% t:* %D + + +design -load read +proc +hierarchy -top dffe +equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx # equivalency check +design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) +cd dffe # Constrain all select calls below inside the top module +select -assert-count 1 t:BUFG +select -assert-count 1 t:FDRE + +select -assert-none t:BUFG t:FDRE %% t:* %D + |