aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
...
| | * | | | | | | | | | bionic -> xenial as its on whitelistEddie Hung2019-08-141-1/+1
| | | | | | | | | | | |
| | * | | | | | | | | | Bump gcc from 4.8 to 4.9 as undefined referenceEddie Hung2019-08-141-36/+7
| |/ / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ... to `__warn_memset_zero_len'. Also remove gcc-6, bump gcc-7 to gcc-9, clang from 5.0 to 8.0
| | * | | | | | | | | Add YOSYS_NO_IDS_REFCNT configuration macroClifford Wolf2019-08-112-2/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * | | | | | | | | Use ID() in kernel/*, add simple ID:: hack (to be improved upon later)Clifford Wolf2019-08-1110-1160/+1182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * | | | | | | | | More improvements and cleanups in IdString subsystemClifford Wolf2019-08-113-43/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - better use of "inline" keyword - deprecate "sticky" IDs feature - improve handling of empty ID - add move constructor Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * | | | | | | | | Use ID() macro in all of passes/opt/Clifford Wolf2019-08-1112-998/+998
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was obtained by running the following SED command in passes/opt/ and then using "meld foo.cc foo.cc.orig" to manually fix all resulting compiler errors. sed -i.orig -r 's/"\\\\([a-zA-Z0-9_]+)"/ID(\1)/g; s/"(\$[a-zA-Z0-9_]+)"/ID(\1)/g;' *.cc Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * | | | | | | | | Improve API of ID() macroClifford Wolf2019-08-111-2/+10
| | | |_|_|/ / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | | * | | | | | | AND with an inverted input, causes X{,N}OR output to be inverted tooEddie Hung2019-08-141-2/+2
| | | | | | | | | |
| | | * | | | | | | Revert "Only sort leaves on non-ANDNOT/ORNOT cells"Eddie Hung2019-08-141-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 5ec5f6dec7d4cdcfd9e1a2cda999886605778400.
| | | * | | | | | | Only sort leaves on non-ANDNOT/ORNOT cellsEddie Hung2019-08-141-6/+7
| | |/ / / / / / / | |/| | | | | | |
| * | | | | | | | Merge pull request #1294 from YosysHQ/revert-1288-eddie/fix_1284Eddie Hung2019-08-141-4/+8
| |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | Revert "Since $_ANDNOT_ is not symmetric, do not sort leaves"
| | * | | | | | | | Revert "Since $_ANDNOT_ is not symmetric, do not sort leaves"Eddie Hung2019-08-141-4/+8
| |/ / / / / / / /
| * | | | | | | | Merge pull request #1288 from YosysHQ/eddie/fix_1284Eddie Hung2019-08-131-8/+4
| |\ \ \ \ \ \ \ \ | | |_|_|_|/ / / / | |/| | | | | | | Since $_ANDNOT_ is not symmetric, do not sort leaves
| | * | | | | | | Since $_ANDNOT_ is not symmetric, do not sort leavesEddie Hung2019-08-121-8/+4
| |/ / / / / / /
* | | | | | | | README updatesMarcin Kościelnicki2019-08-131-0/+14
| | | | | | | |
* | | | | | | | move attributes to wiresMarcin Kościelnicki2019-08-138-311/+546
| | | | | | | |
* | | | | | | | minor review fixesMarcin Kościelnicki2019-08-132-3/+5
| | | | | | | |
* | | | | | | | review fixesMarcin Kościelnicki2019-08-134-47/+34
| | | | | | | |
* | | | | | | | Add clock buffer insertion pass, improve iopadmap.Marcin Kościelnicki2019-08-1310-93/+577
|/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A few new attributes are defined for use in cell libraries: - iopad_external_pin: marks PAD cell's external-facing pin. Pad insertion will be skipped for ports that are already connected to such a pin. - clkbuf_sink: marks an input pin as a clock pin, requesting clock buffer insertion. - clkbuf_driver: marks an output pin as a clock buffer output pin. Clock buffer insertion will be skipped for nets that are already driven by such a pin. All three are module attributes that should be set to a comma-separeted list of pin names. Clock buffer insertion itself works as follows: 1. All cell ports, starting from bottom up, can be marked as clock sinks (requesting clock buffer insertion) or as clock buffer outputs. 2. If a wire in a given module is driven by a cell port that is a clock buffer output, it is in turn also considered a clock buffer output. 3. If an input port in a non-top module is connected to a clock sink in a contained cell, it is also in turn considered a clock sink. 4. If a wire in a module is driven by a non-clock-buffer cell, and is also connected to a clock sink port in a contained cell, a clock buffer is inserted in this module. 5. For the top module, a clock buffer is also inserted on input ports connected to clock sinks, optionally with a special kind of input PAD (such as IBUFG for Xilinx). 6. Clock buffer insertion on a given wire is skipped if the clkbuf_inhibit attribute is set on it.
* | | | | | | Merge pull request #1152 from 1138-4EB/feat-dockerSerge Bazanski2019-08-121-25/+49
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | Dockerfile
| * | | | | | | dockerfile: use 'python:3-slim-buster' base image1138-4EB2019-08-071-5/+8
| | | | | | | |
| * | | | | | | dockerfile: use PREFIX instead of cp1138-4EB2019-08-071-5/+8
| | | | | | | |
| * | | | | | | dockerfile: add ARG IMAGE, use three stages1138-4EB2019-08-071-13/+27
| | | | | | | |
| * | | | | | | dockerfile: reduce number of COPY layers1138-4EB2019-08-071-7/+4
| | | | | | | |
| * | | | | | | dockerfile: DEBIAN_FRONTEND should not be permanent1138-4EB2019-08-071-9/+16
| | | | | | | |
* | | | | | | | Merge pull request #1277 from YosysHQ/eddie/fix_1262Eddie Hung2019-08-112-66/+189
|\ \ \ \ \ \ \ \ | |_|/ / / / / / |/| | | | | | | opt_expr -fine to now trim LSBs of $alu cells too
| * | | | | | | Merge remote-tracking branch 'origin/master' into eddie/fix_1262Eddie Hung2019-08-1191-640/+759
| |\ \ \ \ \ \ \ | |/ / / / / / / |/| | | | | | |
* | | | | | | | Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adderEddie Hung2019-08-1020-180/+180
|\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"
| * | | | | | | | Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"David Shah2019-08-1020-180/+180
|/ / / / / / / /
* | | | | | | | Merge pull request #1258 from YosysHQ/eddie/cleanupClifford Wolf2019-08-1069-414/+405
|\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | Cleanup a few barnacles across codebase
| * | | | | | | | substr() -> compare()Eddie Hung2019-08-0731-127/+127
| | | | | | | | |
| * | | | | | | | RTLIL::S{0,1} -> State::S{0,1} for headersEddie Hung2019-08-075-40/+40
| | | | | | | | |
| * | | | | | | | RTLIL::S{0,1} -> State::S{0,1}Eddie Hung2019-08-0715-86/+86
| | | | | | | | |
| * | | | | | | | Merge remote-tracking branch 'origin/master' into eddie/cleanupEddie Hung2019-08-0719-383/+879
| |\ \ \ \ \ \ \ \
| * | | | | | | | | Remove std:: namespaceEddie Hung2019-08-071-5/+5
| | | | | | | | | |
| * | | | | | | | | 'make clean' to not remove anything abcEddie Hung2019-08-071-1/+1
| | | | | | | | | |
| * | | | | | | | | stoi -> atoiEddie Hung2019-08-0741-121/+121
| | | | | | | | | |
| * | | | | | | | | IdString::str().substr() -> IdString::substr()Eddie Hung2019-08-062-2/+2
| | | | | | | | | |
| * | | | | | | | | Fix typosEddie Hung2019-08-063-9/+9
| | | | | | | | | |
| * | | | | | | | | Fix spacingEddie Hung2019-08-061-3/+3
| | | | | | | | | |
| * | | | | | | | | Use std::stoi instead of atoi(<str>.c_str())Eddie Hung2019-08-0636-109/+109
| | | | | | | | | |
| * | | | | | | | | Use IdString::begins_with()Eddie Hung2019-08-065-28/+30
| | | | | | | | | |
| * | | | | | | | | RTLIL::S{0,1} -> State::S{0,1}Eddie Hung2019-08-062-21/+21
| | | | | | | | | |
| * | | | | | | | | Use State::S{0,1}Eddie Hung2019-08-0610-19/+19
| | | | | | | | | |
| * | | | | | | | | Make liberal use of IdString.in()Eddie Hung2019-08-0618-51/+45
| | | | | | | | | |
| * | | | | | | | | Cleanup opt_expr.ccEddie Hung2019-08-061-35/+30
| | |_|/ / / / / / | |/| | | | | | |
* | | | | | | | | Merge pull request #1261 from YosysHQ/clifford/verific_initClifford Wolf2019-08-103-12/+74
|\ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | Automatically prune init attributes in verific front-end
| * | | | | | | | | Automatically prune init attributes in verific front-end, fixes #1237Clifford Wolf2019-08-073-12/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | Merge pull request #1263 from ucb-bar/firrtl_err_on_unsupported_cellClifford Wolf2019-08-101-1/+1
|\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | FIRRTL error on unsupported cell
| * \ \ \ \ \ \ \ \ \ Merge branch 'master' into firrtl_err_on_unsupported_cellJim Lawson2019-08-0764-489/+1315
| |\ \ \ \ \ \ \ \ \ \ | | | |_|/ / / / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | # Conflicts: # backends/firrtl/firrtl.cc