| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
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| * | | Remove left-over log_ping debug commands.. oops. | Clifford Wolf | 2018-03-31 | 1 | -4/+0 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Merge pull request #521 from azonenberg/for_clifford | Clifford Wolf | 2018-03-31 | 4 | -0/+113 | |
| |\ \ | | | | | | | coolrunner2: Improve optimization for TFF/counters | |||||
| | * | | coolrunner2: Add an ANDTERM/XOR between chained FFs | Robert Ou | 2018-03-31 | 1 | -0/+58 | |
| | | | | | | | | | | | | | | | | | | | | | | In some cases (e.g. the low bits of counters) the design might end up with a flip-flop whose input is directly driven by another flip-flop. This isn't possible in the Coolrunner-II architecture, so add a single AND term and XOR in this case. | |||||
| | * | | coolrunner2: Split multi-bit nets | Robert Ou | 2018-03-31 | 1 | -0/+1 | |
| | | | | | | | | | | | | | | | | The PAR tool doesn't expect any "dangling" nets with no drivers nor sinks. By splitting the nets, clean removes them. | |||||
| | * | | coolrunner2: Add extraction for TFFs | Robert Ou | 2018-03-31 | 3 | -0/+54 | |
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| * | | Add smtio status msgs when --progress is inactive | Clifford Wolf | 2018-03-29 | 1 | -2/+23 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Bugfix in smtio.py VCD file generator | Clifford Wolf | 2018-03-29 | 1 | -1/+1 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Removed $timescale from "sat" command VCD writer | Clifford Wolf | 2018-03-29 | 1 | -1/+0 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Set stack size to at least 128 MB (large stack needed for parsing huge ↵ | Clifford Wolf | 2018-03-27 | 1 | -0/+13 | |
| | | | | | | | | | | | | | expressions) Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Fix tests/simple/specify.v | Clifford Wolf | 2018-03-27 | 1 | -2/+2 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | First draft of Verilog parser support for specify blocks and parameters. | Udi Finkelstein | 2018-03-27 | 3 | -2/+201 | |
| | | | | | | | | | | | The only functionality of this code at the moment is to accept correct specify syntax and ignore it. No part of the specify block is added to the AST | |||||
| * | | Merge pull request #515 from edcote/patch-1 | Clifford Wolf | 2018-03-27 | 1 | -3/+5 | |
| |\ \ | | | | | | | Rename rename to renames | |||||
| | * | | Rename rename to renames | Edmond Cote | 2018-03-20 | 1 | -3/+5 | |
| | | | | | | | | | | Create TCL alias for rename command. Using renames. Following the same convention as proc -> procs. | |||||
| * | | | Chenged "extensions_map" to "extensions_list" in hierarchy.cc | Clifford Wolf | 2018-03-27 | 1 | -2/+2 | |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | Merge pull request #518 from xerpi/master | Clifford Wolf | 2018-03-27 | 1 | -15/+13 | |
| |\ \ \ | | | | | | | | | passes/hierarchy: Reduce code duplication in expand_module | |||||
| | * | | | passes/hierarchy: Reduce code duplication in expand_module | Sergi Granell | 2018-03-27 | 1 | -15/+13 | |
| |/ / / | | | | | | | | | | | | | | | | This also makes it easier to add new file extensions support. Signed-off-by: Sergi Granell <xerpi.g.12@gmail.com> | |||||
| * | | | Add $mem support to SMT2 clock tagging | Clifford Wolf | 2018-03-27 | 1 | -0/+18 | |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | Fix build for new ABC location on github, also update ABC to a2d59be | Clifford Wolf | 2018-03-27 | 1 | -6/+6 | |
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| * | | | Add .sv support to "hierarchy -libdir" | Clifford Wolf | 2018-03-26 | 1 | -0/+6 | |
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| * | | | Fix handling of unclocked immediate assertions in Verific front-end | Clifford Wolf | 2018-03-26 | 3 | -17/+42 | |
| |/ / | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Improve yosys-smtbmc log output and error handling | Clifford Wolf | 2018-03-17 | 1 | -5/+14 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Improve handling of invalid check-sat result in smtio.py | Clifford Wolf | 2018-03-17 | 1 | -1/+2 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Update todo for more features to verificsva.cc | Clifford Wolf | 2018-03-16 | 1 | -3/+3 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Update todo for more features to verificsva.cc | Clifford Wolf | 2018-03-16 | 1 | -0/+1 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Add todo for more features to verificsva.cc | Clifford Wolf | 2018-03-16 | 1 | -8/+45 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Improve import of memories via Verific | Clifford Wolf | 2018-03-15 | 1 | -16/+23 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Fix handling of SV compilation units in Verific front-end | Clifford Wolf | 2018-03-14 | 1 | -28/+25 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Add "expose -input" | Clifford Wolf | 2018-03-12 | 1 | -8/+43 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | Add "setundef -undef" | Clifford Wolf | 2018-03-12 | 1 | -0/+11 | |
| |/ | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Squelch trailing whitespace, including meta-whitespace | Larry Doolittle | 2018-03-11 | 4 | -16/+16 | |
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| * | Harmonize uses of _WIN32 macro | Larry Doolittle | 2018-03-11 | 1 | -1/+1 | |
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| * | Fix SVA handling of NON_CONSECUTIVE_REPEAT and GOTO_REPEAT | Clifford Wolf | 2018-03-10 | 1 | -15/+72 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Fix variable name typo in verificsva.cc | Clifford Wolf | 2018-03-10 | 1 | -2/+2 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Add support for trivial SVA sequences and properties | Clifford Wolf | 2018-03-10 | 1 | -12/+102 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Fix handling of src attributes in flatten | Clifford Wolf | 2018-03-10 | 1 | -7/+2 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Remove debug prints from yosys-smtbmc VCD writer | Clifford Wolf | 2018-03-08 | 1 | -2/+0 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Use Verific hier_tree component for elaboration | Clifford Wolf | 2018-03-08 | 2 | -1/+55 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Check results of (check-sat) in yosys-smtbmc | Clifford Wolf | 2018-03-07 | 1 | -0/+2 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Fix Verific handling of "assert property (..);" in always block | Clifford Wolf | 2018-03-07 | 3 | -14/+60 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Add "verific -import -V" | Clifford Wolf | 2018-03-07 | 2 | -6/+18 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Set Verific db_preserve_user_nets flag | Clifford Wolf | 2018-03-07 | 1 | -0/+1 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Add Xilinx RAM64X1D and RAM128X1D simulation models | Clifford Wolf | 2018-03-07 | 4 | -23/+30 | |
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| * | Add "memory_nordff" pass | Clifford Wolf | 2018-03-06 | 2 | -0/+112 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Update comment about supported SVA in verificsva.cc | Clifford Wolf | 2018-03-06 | 1 | -51/+8 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Add SVA NON_CONSECUTIVE_REPEAT and GOTO_REPEAT support | Clifford Wolf | 2018-03-06 | 1 | -20/+41 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Add SVA first_match() support | Clifford Wolf | 2018-03-06 | 1 | -0/+16 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Add SVA within support | Clifford Wolf | 2018-03-06 | 1 | -2/+18 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Add support for SVA sequence intersect | Clifford Wolf | 2018-03-06 | 1 | -36/+251 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Add get_fsm_accept_reject for parsing SVA properties | Clifford Wolf | 2018-03-06 | 1 | -73/+86 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Simplified SVA "until" handling | Clifford Wolf | 2018-03-06 | 1 | -25/+16 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
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index : iCE40/yosys | |
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