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The existing code does a search to figure out whether id is in the
dict (with the call to count()), and then looks it up again to get the
result (with the call to at()). This version calls find() instead,
avoiding the double lookup.
Code size increases slightly (6kb). I think this is because the
contents of find() are getting inlined, and then inlined into lots of
the callsites for cell() and wire().
Looking at the compiled code before this patch, you just get
a (non-inlined) call to count() followed by a call to at(). After the
patch, the contents of find() have been inlined (so you see do_hash,
then do_lookup). The result for each function is about 30 bytes / 40%
bigger, which presumably also enlarges call-sites that inline it.
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Silence spurious warning in Verilog lexer when compiling with GCC
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The chosen value shouldn't have any effect. I considered something
clearly wrong like -1, but there's no checking inside the generated
lexer, and I suspect this will cause even weirder bugs if triggered
than just setting it to INITIAL.
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Use default copy constructor for RTLIL::SigBit
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There was a handwritten copy constructor, which I'm not sure was
actually legal C++ (it unconditionally read from the 'data' member of
a union, which wouldn't have been written if wire was true). It was
also a bit less efficient than the constructor you get from the
compiler by default (which is allowed to just copy the memory).
This gives a marginal (~0.25%) decrease in code size when compiled
with GCC 9.3.
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Use c_str(), not str() for IdString/std::string == and != operators
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These operators work by fetching the string from the global string
table and then comparing with the std::string that was passed in as
rhs.
Using str() means that we create a std::string (strlen; malloc;
memcpy), compare for equality (another memcmp if they have the same
length) and then finally free the string.
Using c_str() means that we pass the const char* straight to
std::string's equality operator. This ends up as a call to
std::string::compare (the const char* flavour), which is essentially
strcmp.
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Minor fixes for CXXRTL
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xilinx: tidy up cells_sim.v a little
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verilog: allow attributes on behavioural statements (including null statement)
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... rule which causes a s/r conflict. Now we get an empty genblock,
which should be okay.
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qbfsat: Add an iterative bisection optimization method and make it the default.
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86fc49a9d60f9ad4cdeec93663e7245a9fdf60c6.
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Also adds `-nooptimize` and reorganizes `qbfsat.cc` a bit.
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xaiger: do not derive cells
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ecp5: cleanup unused +/ecp5/abc9_model.v
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cxxrtl: get rid of -O5 aka `opt_clean -purge` optimization level
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This isn't actually necessary anymore after scheduling was improved,
and `clean -purge` disrupts the mapping between wires in the input
RTLIL netlist and the output CXXRTL code.
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verilog: support attributes before (not after) task identifier (but 13 s/r conflicts)
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Co-authored-by: Alberto Gonzalez <61295559+boqwxp@users.noreply.github.com>
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log: Use `dict` instead of `std::vector<std::pair>` for `log_expect_{error, warning, log}` to better express the intent that each element is unique.
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warning, log}` to better express the intent that each element is unique.
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Extend YS_DEBUGTRAP to MacOS.
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smtbmc: Fix return status handling.
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Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
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Fixes #2058.
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abc9: support seq synthesis when module has (* abc9_flop *) and bypass non-combinatorial (* abc9_box *)
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instead of moving them to $__ prefix
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