| Commit message (Expand) | Author | Age | Files | Lines | ||
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| * | | | | | | opt_merge: Dedup one more use of FF cell type list. | Marcelina Kościelnicka | 2020-07-15 | 1 | -3/+1 | |
| * | | | | | | achronix: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-14 | 1 | -1/+1 | |
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| * | | | | | intel: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-13 | 8 | -178/+17 | |
| * | | | | | Revert "intel_alm: direct M10K instantiation" | Lofty | 2020-07-13 | 8 | -128/+38 | |
| * | | | | | Merge pull request #2263 from whitequark/cxxrtl-capi-eval-commit | whitequark | 2020-07-13 | 2 | -0/+20 | |
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| | * | | | | | cxxrtl: expose eval() and commit() via the C API. | whitequark | 2020-07-12 | 2 | -0/+20 | |
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| * | | | | | xilinx: Fix srl regression. | Marcelina Kościelnicka | 2020-07-12 | 2 | -2/+43 | |
| * | | | | | proc_dlatch: Remove init values for combinatorial processes. | Marcelina Kościelnicka | 2020-07-12 | 1 | -0/+33 | |
| * | | | | | dfflegalize: Gather init values from all wires. | Marcelina Kościelnicka | 2020-07-12 | 1 | -1/+1 | |
| * | | | | | Merge pull request #2256 from YosysHQ/claire/fix2241 | clairexen | 2020-07-10 | 1 | -0/+2 | |
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| | * | | | | Add AST_EDGE support to AstNode::detect_latch(), fixes #2241 | Claire Wolf | 2020-07-10 | 1 | -0/+2 | |
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| * | | | | Merge pull request #2255 from whitequark/bison-Werror-conflicts | whitequark | 2020-07-09 | 6 | -69/+11 | |
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| | * | | | | verilog_parser: turn S/R and R/R conflicts into hard errors. | whitequark | 2020-07-09 | 1 | -1/+1 | |
| | * | | | | Revert PRs #2203 and #2244. | whitequark | 2020-07-09 | 5 | -68/+10 | |
| * | | | | | Merge pull request #2254 from whitequark/cxxrtl-extern-c | whitequark | 2020-07-09 | 1 | -0/+1 | |
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| | * | | | | | cxxrtl: add missing extern "C". | whitequark | 2020-07-09 | 1 | -0/+1 | |
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| * / / / / | sf2: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-09 | 2 | -44/+13 | |
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| * | | | | xilinx: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-09 | 6 | -484/+131 | |
| * | | | | dfflibmap: Refactor to use dfflegalize internally. | Marcelina Kościelnicka | 2020-07-09 | 5 | -212/+214 | |
| * | | | | Fix issue #2251 (#2252) | Lucas Castro | 2020-07-09 | 1 | -1/+1 | |
| * | | | | clkbufmap: improve input pad handling. | Marcelina Kościelnicka | 2020-07-09 | 2 | -17/+118 | |
| * | | | | Merge pull request #2244 from antmicro/logic | clairexen | 2020-07-09 | 4 | -7/+31 | |
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| | * | | | | Add logic param and integer bad syntax tests | Kamil Rakoczy | 2020-07-06 | 3 | -0/+21 | |
| | * | | | | Support logic typed parameters | Lukasz Dalek | 2020-07-06 | 1 | -7/+10 | |
| * | | | | | clk2fflogic: Consistently treat async control signals as negative hold. | Marcelina Kościelnicka | 2020-07-09 | 8 | -88/+82 | |
| * | | | | | dfflegalize: Add special support for const-D latches. | Marcelina Kościelnicka | 2020-07-09 | 2 | -0/+71 | |
| * | | | | | Merge pull request #2246 from YosysHQ/mwk/dfflegalize-typo | whitequark | 2020-07-07 | 1 | -1/+1 | |
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| | * | | | | | dfflegalize: typo fix | Marcelina Kościelnicka | 2020-07-07 | 1 | -1/+1 | |
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| * | | | | | efinix: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-06 | 2 | -15/+53 | |
| * | | | | | gowin: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-06 | 4 | -158/+49 | |
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| * | | | | intel_alm: direct M10K instantiation | Dan Ravensloft | 2020-07-05 | 8 | -38/+128 | |
| * | | | | Naming fixes. | Marcelina Kościelnicka | 2020-07-05 | 2 | -2/+2 | |
| * | | | | synth_gowin: ABC9 support | Dan Ravensloft | 2020-07-05 | 3 | -35/+345 | |
| * | | | | intel_alm: add Cyclone 10 GX tests | Dan Ravensloft | 2020-07-05 | 11 | -2/+236 | |
| * | | | | Merge pull request #2236 from YosysHQ/mwk/dfflegalize-ice40 | Marcelina Kościelnicka | 2020-07-05 | 4 | -208/+24 | |
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| | * | | | | ice40: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-05 | 4 | -208/+24 | |
| * | | | | | ecp5: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-05 | 4 | -254/+96 | |
| * | | | | | Merge pull request #2227 from Ravenslofty/ccache | whitequark | 2020-07-05 | 1 | -0/+5 | |
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| | * | | | | | Add option to use ccache when building | Dan Ravensloft | 2020-07-04 | 1 | -0/+5 | |
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| * | | | | | Merge pull request #2232 from YosysHQ/mwk/gowin-sim-init | Marcelina Kościelnicka | 2020-07-05 | 1 | -8/+8 | |
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| | * | | | | | gowin: Fix INIT values in sim library. | Marcelina Kościelnicka | 2020-07-05 | 1 | -8/+8 | |
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| * | | | | | dfflegalize: Prefer mapping dff to sdff before adff | Marcelina Kościelnicka | 2020-07-05 | 1 | -1/+1 | |
| * | | | | | opt_expr: Fix crash on $mul optimization with more zeros removed than Y has. | Marcelina Kościelnicka | 2020-07-05 | 2 | -0/+24 | |
| * | | | | | intel_alm: DSP inference | Dan Ravensloft | 2020-07-05 | 7 | -9/+209 | |
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| * | | | | gowin: replace determine_init with setundef | Dan Ravensloft | 2020-07-04 | 3 | -74/+1 | |
| * | | | | synth_intel_alm: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-04 | 3 | -122/+10 | |
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| * | | | Improve MISTRAL_FF specify rules | Dan Ravensloft | 2020-07-04 | 2 | -6/+6 | |
| * | | | tests: update fsm.ys resource count | Eddie Hung | 2020-07-04 | 1 | -4/+4 | |
| * | | | abc9: only techmap (* abc9_flop *) modules | Eddie Hung | 2020-07-04 | 1 | -1/+1 | |
| * | | | intel_alm: compose $__MISTRAL_FF_SYNCONLY from MISTRAL_FF | Eddie Hung | 2020-07-04 | 2 | -47/+2 | |
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index : iCE40/yosys | |
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