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* nexus: DSP inference supportDavid Shah2020-11-204-13/+151
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Bump versionYosys Bot2020-11-191-1/+1
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* Merge pull request #2441 from YosysHQ/dave/nexus_dsp_simMiodrag Milanović2020-11-183-250/+573
|\ | | | | nexus: Add DSP simulation model
| * nexus: Add DSP simulation modelDavid Shah2020-11-183-250/+573
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Fix duplicated parameter name typoMiodrag Milanovic2020-11-181-1/+1
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* | Bump versionYosys Bot2020-11-171-1/+1
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* | backends/blif: Remove unused vector of strings (#2420)William Woodruff2020-11-161-57/+53
| | | | | | | | | | | | | | | | | | | | | | * backends/blif: Remove unused vector of strings For reasons that are unclear to me, this was being used to store every result of `cstr` before returning them. The vector was never accessed otherwise, resulting in a huge unnecessary memory sink when emitting to BLIF. * backends/blif: Remove CSTR macro * backends/blif: Actually call str()
* | Merge pull request #2438 from kbeckmann/gowin_rpllMiodrag Milanović2020-11-161-0/+45
|\ \ | | | | | | synth_gowin: Add rPLL blackbox
| * | synth_gowin: Add rPLL blackboxKonrad Beckmann2020-11-111-0/+45
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* | Bump versionYosys Bot2020-11-111-1/+1
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* | Merge pull request #2433 from YosysHQ/paths_as_globalsMiodrag Milanović2020-11-104-43/+63
|\ \ | | | | | | Expose abc and data paths as globals for pyosys
| * | Expose abc and data paths as globalsMiodrag Milanovic2020-11-064-43/+63
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* | Bump versionYosys Bot2020-11-081-1/+1
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* | Merge pull request #2414 from zeldin/abc-depend-clang-fixwhitequark2020-11-071-0/+4
|\ \ | | | | | | Prevent CXXFLAGS from leaking to abc Makefile
| * | Prevent CXXFLAGS from leaking to abc MakefileMarcus Comstedt2020-11-071-0/+4
| | | | | | | | | | | | This fixes an issue with abc/depends.sh when the compiler is clang.
* | | Merge pull request #2432 from Xiretza/nexus-testsMiodrag Milanović2020-11-071-19/+3
|\ \ \ | |_|/ |/| | Update nexus arch tests to new harness
| * | Update nexus arch tests to new harnessXiretza2020-10-291-19/+3
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* | Bump versionYosys Bot2020-11-031-1/+1
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* | Merge pull request #2426 from whitequark/cxxrtl-auto-topwhitequark2020-11-021-7/+26
|\ \ | | | | | | cxxrtl: run `hierarchy -auto-top` if no top module is present
| * | cxxrtl: run `hierarchy -auto-top` if no top module is present.whitequark2020-11-021-7/+26
|/ / | | | | | | | | | | | | | | | | | | | | | | In most cases, a CXXRTL simulation would use a top module, either because this module serves as an entry point to the CXXRTL C API, or because the outputs of a top module are unbuffered, improving performance. Taking this into account, the CXXRTL backend now runs `hierarchy -auto-top` if there is no top module. For the few cases where this behavior is unwanted, it now accepts a `-nohierarchy` option. Fixes #2373.
* | Bump versionYosys Bot2020-11-021-1/+1
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* | Merge pull request #2425 from whitequark/cxxrtl-meminit-constnesswhitequark2020-11-011-2/+4
|\ \ | | | | | | cxxrtl: don't assert on non-constant $meminit inputs
| * | cxxrtl: don't assert on non-constant $meminit inputs.whitequark2020-11-011-2/+4
|/ / | | | | | | Fixes #2129.
* | Merge pull request #2424 from whitequark/cxxrtl-multiple-driverswhitequark2020-11-011-0/+2
|\ \ | | | | | | cxxrtl: don't assert on wires with multiple drivers
| * | cxxrtl: don't assert on wires with multiple drivers.whitequark2020-11-011-0/+2
|/ / | | | | | | Fixes #2374.
* | Bump versionYosys Bot2020-11-011-1/+1
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* | Merge pull request #2416 from QuantamHD/masterwhitequark2020-10-311-1/+6
|\ \ | | | | | | Adds support for defining abc location at runtime
| * | This patch adds support for defining the ABC location at runtime instead of ↵Ethan Mahintorabi2020-10-281-1/+6
| |/ | | | | | | | | | | at compile time. This is helpful in build systems like bazel which do not have stable locations for binaries or directories during the compilation phase. This change should be backwards compatible with the existing behavior.
* | Bump versionYosys Bot2020-10-311-1/+1
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* | Update verific versionMiodrag Milanovic2020-10-301-1/+1
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* Bump versionYosys Bot2020-10-251-1/+1
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* xilinx: Fix attributes_test.ysMarcelina Kościelnicka2020-10-241-4/+2
| | | | | | | | | | This test pretty much passes by accident — the `prep` command runs memory_collect without memory_dff first, which prevents merging read register into the memory, and thus blocks block RAM inference for a reason completely unrelated to the attribute. The attribute setting didn't actually work because it was set on the containing module instead of the actual memory.
* Bump versionYosys Bot2020-10-231-1/+1
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* nexus: Add make_transp to BRAMsDavid Shah2020-10-221-0/+3
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Merge pull request #2403 from nakengelhardt/sim_timescaleN. Engelhardt2020-10-221-0/+21
|\ | | | | sim -vcd: add date, version, and option for timescale
| * use strftime instead of put_time for gcc 4.8 compatibilityN. Engelhardt2020-10-211-4/+5
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| * wild guessing at the problem because it builds fine on my machinesN. Engelhardt2020-10-161-0/+3
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| * sim -vcd: add date, version, and option for timescaleN. Engelhardt2020-10-161-0/+17
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* | memory_dff: Fix needlessly duplicating enable bits.Marcelina Kościelnicka2020-10-222-0/+32
| | | | | | | | | | | | | | | | | | When the register being merged into the EN signal happens to be a $sdff, the current code creates a new $mux for every bit, even if they happen to be identical (as is usually the case), preventing proper grouping further down the flow. Fix this by adding a simple cache. Fixes #2409.
* | Bump versionYosys Bot2020-10-221-1/+1
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* | btor: Use Mem helper.Marcelina Kościelnicka2020-10-211-93/+102
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* | smt2: Use Mem helper.Marcelina Kościelnicka2020-10-211-186/+244
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* | verilog_backend: Use Mem helper.Marcelina Kościelnicka2020-10-211-274/+251
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* | sim: Use Mem helper.Marcelina Kościelnicka2020-10-211-103/+90
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* | clk2fflogic: Use Mem helper.Marcelina Kościelnicka2020-10-211-68/+45
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* | opt_mem: Use Mem helpers.Marcelina Kościelnicka2020-10-211-81/+6
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* | memory_bram: Use Mem helpers.Marcelina Kościelnicka2020-10-211-121/+90
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* | memory_map: Use Mem helpers.Marcelina Kościelnicka2020-10-211-138/+81
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* | memory_unpack: Use Mem helpers.Marcelina Kościelnicka2020-10-211-106/+10
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* | memory_collect: Use Mem helpers.Marcelina Kościelnicka2020-10-211-223/+9
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