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* Add logic param and integer bad syntax testsKamil Rakoczy2020-07-063-0/+21
| | | | Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
* Support logic typed parametersLukasz Dalek2020-07-061-7/+10
| | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
* intel_alm: direct M10K instantiationDan Ravensloft2020-07-058-38/+128
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* Naming fixes.Marcelina Kościelnicka2020-07-052-2/+2
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* synth_gowin: ABC9 supportDan Ravensloft2020-07-053-35/+345
| | | | | This adds ABC9 support for synth_gowin; drastically improving synthesis quality.
* intel_alm: add Cyclone 10 GX testsDan Ravensloft2020-07-0511-2/+236
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* Merge pull request #2236 from YosysHQ/mwk/dfflegalize-ice40Marcelina Kościelnicka2020-07-054-208/+24
|\ | | | | ice40: Use dfflegalize.
| * ice40: Use dfflegalize.Marcelina Kościelnicka2020-07-054-208/+24
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* | ecp5: Use dfflegalize.Marcelina Kościelnicka2020-07-054-254/+96
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* | Merge pull request #2227 from Ravenslofty/ccachewhitequark2020-07-051-0/+5
|\ \ | | | | | | Add option to use ccache when building
| * | Add option to use ccache when buildingDan Ravensloft2020-07-041-0/+5
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* | | Merge pull request #2232 from YosysHQ/mwk/gowin-sim-initMarcelina Kościelnicka2020-07-051-8/+8
|\ \ \ | | | | | | | | gowin: Fix INIT values in sim library.
| * | | gowin: Fix INIT values in sim library.Marcelina Kościelnicka2020-07-051-8/+8
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* | | | dfflegalize: Prefer mapping dff to sdff before adffMarcelina Kościelnicka2020-07-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This ensures that, when both sync and async FFs are available and abc9 is involved, the sync FFs will be used, and will thus remain available for sequential synthesis.
* | | | opt_expr: Fix crash on $mul optimization with more zeros removed than Y has.Marcelina Kościelnicka2020-07-052-0/+24
| | | | | | | | | | | | | | | | Fixes #2221.
* | | | intel_alm: DSP inferenceDan Ravensloft2020-07-057-9/+209
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* | | gowin: replace determine_init with setundefDan Ravensloft2020-07-043-74/+1
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* | | synth_intel_alm: Use dfflegalize.Marcelina Kościelnicka2020-07-043-122/+10
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* | Improve MISTRAL_FF specify rulesDan Ravensloft2020-07-042-6/+6
| | | | | | | | Co-authored-by: Eddie Hung <eddie@fpgeh.com>
* | tests: update fsm.ys resource countEddie Hung2020-07-041-4/+4
| | | | | | | | | | Suspect it is to do with map/set ordering in techmap; should be fixed by #1862?
* | abc9: only techmap (* abc9_flop *) modulesEddie Hung2020-07-041-1/+1
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* | intel_alm: compose $__MISTRAL_FF_SYNCONLY from MISTRAL_FFEddie Hung2020-07-042-47/+2
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* | abc9: techmap from user design to allow abc9_flop modules to be composedEddie Hung2020-07-041-1/+1
| | | | | | | | from other primitives
* | intel_alm: add $__ prefix to MISTRAL_FF_SYNCONLYEddie Hung2020-07-044-4/+4
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* | intel_alm: ABC9 sequential optimisationsDan Ravensloft2020-07-047-19/+149
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* Add newlines to help text for dfflegalizeRupert Swarbrick2020-07-031-11/+11
| | | | | | | | | | | | | I think these were probably missed by accident. Spotted because GCC spits out lots of messages like this: passes/techmap/dfflegalize.cc:114:7: warning: zero-length gnu_printf format string [-Wformat-zero-length] 114 | log(""); | ^~ (because we tell GCC that the first argument to log() looks like a printf control string in log.h, and a zero length such string triggers a warning).
* Merge pull request #2132 from YosysHQ/eddie/verific_initialclairexen2020-07-021-17/+36
|\ | | | | verific: rewrite initial assume/asserts prior to elaboration
| * verific: rewrite initial assume/asserts prior to elaborationEddie Hung2020-05-151-17/+36
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* | Merge pull request #2208 from boqwxp/qbfsat-cleanupclairexen2020-07-023-255/+274
|\ \ | | | | | | qbfsat: Cleanup and refactoring
| * | qbfsat: Remove useless comment and #ifndef guards.Alberto Gonzalez2020-07-011-5/+0
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| * | qbfsat: Specify default values for some options in the help message.Alberto Gonzalez2020-07-011-0/+2
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| * | qbfsat: Clean up external executable command lines and update temporary ↵Alberto Gonzalez2020-07-011-3/+7
| | | | | | | | | | | | directory name.
| * | qbfsat: Clean up and refactor data structures into `qbfsat.h`.Alberto Gonzalez2020-07-013-248/+266
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* | | Merge pull request #2186 from YosysHQ/mwk/dfflegalizeclairexen2020-07-0220-0/+4316
|\ \ \ | | | | | | | | Add dfflegalize pass.
| * | | dfflegalize: Add tests.Marcelina Kościelnicka2020-07-0117-0/+2957
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| * | | Add dfflegalize pass.Marcelina Kościelnicka2020-07-013-0/+1359
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* | | | Merge pull request #2211 from YosysHQ/mwk/fix-fmcombine-ffclairexen2020-07-021-2/+1
|\ \ \ \ | | | | | | | | | | fmcombine: use the master ff cell type list
| * | | | fmcombine: use the master ff cell type listMarcelina Kościelnicka2020-06-301-2/+1
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* | | | Merge pull request #2210 from YosysHQ/mwk/fix-opt_mergeclairexen2020-07-021-3/+1
|\ \ \ \ | | | | | | | | | | opt_merge: use the master FF type list
| * | | | opt_merge: use the master FF type listMarcelina Kościelnicka2020-06-301-3/+1
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* | | | Merge pull request #2195 from YosysHQ/mwk/manual-gatesclairexen2020-07-021-50/+201
|\ \ \ \ | |_|/ / |/| | | Add a few more gate types to the manual.
| * | | Add latches to the manual.Marcelina Kościelnicka2020-06-261-42/+165
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| * | | Add a few more gate types to the manual.Marcelina Kościelnicka2020-06-261-8/+36
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* | | | Merge pull request #2203 from antmicro/fix-grammarclairexen2020-07-012-4/+38
|\ \ \ \ | | | | | | | | | | Signed and macro grammar update
| * | | | Add signed/unsigned testsKamil Rakoczy2020-06-261-0/+28
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
| * | | | Parse macro call attached semicolon as empty expressionLukasz Dalek2020-06-261-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
| * | | | Fix integer signing grammarLukasz Dalek2020-06-261-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit fixes signed/unsigned grammar in parameters as defined in SV LRM A2.2.1. Example of correct parameters: parameter integer signed i = 0; parameter integer unsigned i = 0; Example of incorrect parameters: parameter signed integer i = 0; parameter unsigned integer i = 0; Signed-off-by: Lukasz Dalek <ldalek@antmicro.com> Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
* | | | | Merge pull request #2179 from splhack/static-castclairexen2020-07-0111-0/+135
|\ \ \ \ \ | | | | | | | | | | | | Support SystemVerilog Static Cast
| * | | | | static cast: simplifyKazuki Sakamoto2020-06-191-0/+7
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| * | | | | static cast: add testsKazuki Sakamoto2020-06-195-0/+80
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