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* | Added support for resource sharing in mux control logicClifford Wolf2014-07-201-86/+155
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* | Added "select -assert-count"Clifford Wolf2014-07-201-6/+43
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* | Supercell creation for $div/$mod worked all along, fixed test benchesClifford Wolf2014-07-203-8/+3
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* | Improved tests/share/generate.pyClifford Wolf2014-07-201-2/+12
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* | Fixed creation of shift supercells in "share" passClifford Wolf2014-07-201-4/+20
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* | Small fix in tests/vloghtb/run-test.shClifford Wolf2014-07-201-0/+2
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* | Activated tests/share in "make test"Clifford Wolf2014-07-201-0/+1
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* | Added "miter -equiv -flatten"Clifford Wolf2014-07-202-2/+15
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* | Added call_on_selection() and call_on_module() APIClifford Wolf2014-07-204-16/+37
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* | Added tests/vloghtb/test_share.shClifford Wolf2014-07-205-1/+57
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* | Added tests/share for testing "share" supercell creationClifford Wolf2014-07-203-0/+58
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* | Added "share" supercell creationClifford Wolf2014-07-201-1/+115
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* | Added removing of always inactive cells to "share" passClifford Wolf2014-07-201-8/+42
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* | Progress in "share" passClifford Wolf2014-07-201-112/+185
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* | Added std::set<RTLIL::SigBit> to RTLIL::SigSpec conversionClifford Wolf2014-07-202-3/+11
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* | Added SIZE() macroClifford Wolf2014-07-201-0/+2
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* | Added log_cell()Clifford Wolf2014-07-202-0/+17
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* | Progress in "share" passClifford Wolf2014-07-201-19/+56
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* | Added tests/vloghtbClifford Wolf2014-07-202-0/+18
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* | Use functions instead of always blocks for $mux/$pmux/$safe_pmux in verilog ↵Clifford Wolf2014-07-201-17/+21
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* | Added support for $bu0 to verilog backendClifford Wolf2014-07-201-0/+16
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* | Started to implement real resource sharingClifford Wolf2014-07-192-0/+444
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* | Fixed log_id() memory corruptionClifford Wolf2014-07-192-5/+10
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* | Improved memory_share log messagesClifford Wolf2014-07-191-3/+3
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* | More verbose memory_share help messageClifford Wolf2014-07-191-0/+17
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* | Added SAT-based write-port sharing to memory_shareClifford Wolf2014-07-192-0/+205
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* | Added ModWalker helper classClifford Wolf2014-07-191-0/+298
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* | Some "const" cleanups in SigMapClifford Wolf2014-07-191-4/+4
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* | Fixed bug in memory_share feedback-to-en codeClifford Wolf2014-07-192-4/+36
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* | Added translation from read-feedback to en-signals in memory_shareClifford Wolf2014-07-183-10/+264
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* | Improved seeding of color rng in show commandClifford Wolf2014-07-181-1/+3
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* | Only create collision detect logic in memory_share if necessaryClifford Wolf2014-07-181-4/+47
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* | Bugfix in tests/memories/run-test.shClifford Wolf2014-07-181-2/+2
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* | added tests/memoriesClifford Wolf2014-07-185-0/+133
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* | Added memory_shareClifford Wolf2014-07-183-0/+266
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* | Added automatic conversion from RTLIL::SigSpec to std::vector<RTLIL::SigBit>Clifford Wolf2014-07-181-0/+1
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* | Apply opt_reduce WR_EN opts to the whole mux tree driving the WR_EN portClifford Wolf2014-07-181-0/+15
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* | Added function-like cell creation helpersClifford Wolf2014-07-182-73/+158
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* | Added log_id() helper functionClifford Wolf2014-07-181-0/+8
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* | Also simulate unmapped memories in "make test"Clifford Wolf2014-07-171-1/+1
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* | Implemented dynamic bit-/part-select for memory writesClifford Wolf2014-07-172-3/+66
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* | Fixed simlib.v model for $memClifford Wolf2014-07-171-15/+15
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* | Added support for bit/part select to mem2reg rewriterClifford Wolf2014-07-172-0/+30
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* | Added support for constant bit- or part-select for memory writesClifford Wolf2014-07-172-9/+56
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* | Improved opt_reduce handling of mem wr_en mux bitsClifford Wolf2014-07-171-5/+18
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* | Fixed RTLIL::SigSpec::append_bit() for appending constantsClifford Wolf2014-07-171-2/+3
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* | Added support for "blackbox" attribute to iopadmapClifford Wolf2014-07-171-1/+1
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* | Added support for "blackbox" attribute to flatten/techmapClifford Wolf2014-07-171-1/+4
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* | Added "inout" ports support to read_libertyClifford Wolf2014-07-161-1/+6
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* | Set blackbox attribute in "read_liberty -lib"Clifford Wolf2014-07-161-0/+3
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