| Commit message (Collapse) | Author | Age | Files | Lines |
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mention tabby+oss cad suite in readme
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If a local variable is always assigned before it is used, then adding
nosync prevents latches from being needlessly generated.
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- Prevent unmatched expected error patterns from self-matching
- Prevent infinite recursion on unmatched expected warnings
- Always print the error message for unmatched error patterns
- Add test coverage for all unmatched message types
- Add test coverage for excess matched logs and warnings
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Newer GCCs emit the following warning for opt_dff:
passes/opt/opt_dff.cc:560:17: warning: operation on ‘ff.Yosys::FfData::has_clk’ may be undefined [-Wsequence-point]
560 | ff.has_clk = ff.has_ce = ff.has_clk = false;
| ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Which is correct: the order of whether the read or write of has_clk
occurs first is undefined since there is no sequence point between them.
This is almost certainly just a typo/copy paste error and objectively
wrong, so just fix it.
Signed-off-by: Austin Seipp <aseipp@pobox.com>
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Signed-off-by: gatecat <gatecat@ds0.me>
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- add generated doubleslash.v to .gitignore
- ensure backend verilog can be read again
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cxxrtl: don't reset elided wires with \init attribute
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This BRAM mode uses both address ports, making it effectively single-port.
Since memory_bram can't presently map to single-port memories, remove it.
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Fixes #3117.
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I also removed the unnecessary shadowing of `width_hint` and `sign_hint`
in the corresponding case in `simplify()`.
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cxxrtl: demote wires not inlinable only in debug_eval to locals
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Fixes #3112.
Co-authored-by: Irides <irides@irides.network>
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bugpoint: avoid infinite loop between -connections and -wires
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Fixes #3113.
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The preprocessor currently destroys double slash containing escaped
identifiers (for example \a//b ). This is due to next_token trying to
convert single line comments (//) into /* */ comments. This then leads
to an unintuitive error message like this:
ERROR: syntax error, unexpected '*'
This patch fixes the error by recognizing escaped identifiers and
returning them as single token. It also adds a testcase.
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Fix null pointer dereference after failing to extract DFF from memory
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Fixes #3110.
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Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
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Add YOSYS to the implicitly defined verilog macros in verific
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Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
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This should remove instances of zero-width sigspecs in the netlist,
avoiding problems in the Verilog backend with emitting them.
See #3103.
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cxxrtl: preserve interior memory pointers across reset
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Before this commit, values, wires, and memories with an initializer
were value-initialized in emitted C++ code. After this commit, all
values, wires, and memories are default-initialized, and the default
constructor of generated modules calls the reset() method, which
assigns the members that have an initializer.
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This makes the depth properly immutable.
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