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* cxxrtl: add templated black box support.whitequark2020-04-181-16/+193
* cxxrtl: make eval() and commit() inline in blackboxes.whitequark2020-04-181-82/+103
* cxxrtl: add simple black box support.whitequark2020-04-181-70/+258
* cxxrtl: use ID::X instead of ID(X). NFC.whitequark2020-04-181-107/+107
* cxxrtl: correctly handle `sync always` rules.whitequark2020-04-171-3/+13
* cxxrtl: make ROMs writable, document memory::operator[].whitequark2020-04-161-2/+1
* cxxrtl: fix misleading example, caution about race conditions.whitequark2020-04-161-4/+13
* cxxrtl: remove inaccurate comment. NFC.whitequark2020-04-161-2/+0
* cxxrtl: Fix handling of unclocked memory read portsDavid Shah2020-04-141-2/+3
* Merge pull request #1922 from whitequark/write_cxxrtl-disconnected-outputswhitequark2020-04-141-0/+2
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| * write_cxxrtl: ignore disconnected module ports.whitequark2020-04-141-0/+2
* | write_cxxrtl: enable separate compilation.whitequark2020-04-141-9/+81
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* write_cxxrtl: add basic documentation.whitequark2020-04-091-1/+16
* write_cxxrtl: add support for $dlatch and $dlatchsr cells.whitequark2020-04-091-3/+16
* write_cxxrtl: add support for $sr cell.whitequark2020-04-091-27/+35
* write_cxxrtl: add support for $slice and $concat cells.whitequark2020-04-091-1/+16
* write_cxxrtl: improve writable memory handling.whitequark2020-04-091-26/+23
* write_cxxrtl: add support for hierarchical designs.whitequark2020-04-091-18/+107
* write_cxxrtl: avoid undefined behavior on out-of-bounds memory access.whitequark2020-04-091-38/+65
* write_cxxrtl: statically schedule comb logic and localize wires.whitequark2020-04-091-68/+364
* write_cxxrtl: elide wires for results of comb cells used once.whitequark2020-04-091-35/+359
* write_cxxrtl: new backend.whitequark2020-04-091-0/+904
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