iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Use log_file_warning(), log_file_error() functions.	Henner Zeller	2018-07-20	1	-5/+3
\| \| \| \|	Wherever we can report a source-level location.
*	Replace -ignore_redef with -[no]overwrite	Clifford Wolf	2018-05-03	1	-6/+17
\| \| \| \|	Signed-off-by: Clifford Wolf <clifford@clifford.at>
*	Bugfix in verilog_defaults argument parser	Clifford Wolf	2017-12-24	1	-1/+1
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*	Add a paragraph about pre-defined macros to read_verilog help message	Clifford Wolf	2017-07-21	1	-0/+4
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*	Added "verilog_defines" command	Clifford Wolf	2016-12-15	1	-0/+60
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*	Bugfix in "read_verilog -D NAME=VAL" handling	Clifford Wolf	2016-11-28	1	-3/+3
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*	Remember global declarations and defines accross read_verilog calls	Clifford Wolf	2016-11-15	1	-1/+1
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*	Added read_verilog -norestrict -assume-asserts	Clifford Wolf	2016-08-26	1	-1/+17
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*	Added "read_verilog -dump_rtlil"	Clifford Wolf	2016-07-27	1	-1/+9
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*	No tristate warning message for "read_verilog -lib"	Clifford Wolf	2016-07-23	1	-3/+3
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*	Small improvements in Verilog front-end docs	Clifford Wolf	2016-05-20	1	-0/+3
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*	Added "yosys -D" feature	Clifford Wolf	2016-04-21	1	-1/+1
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*	Fixed typos in verilog_defaults help message	Clifford Wolf	2016-03-10	1	-3/+3
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*	SystemVerilog also has assume(), added implicit -D FORMAL	Clifford Wolf	2015-10-13	1	-2/+2
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*	Added read_verilog -nodpi	Clifford Wolf	2015-09-23	1	-0/+19
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*	Re-created command-reference-manual.tex, copied some doc fixes to online help	Clifford Wolf	2015-08-14	1	-6/+6
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*	Spell check (by Larry Doolittle)	Clifford Wolf	2015-08-14	1	-1/+1
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*	Add -noautowire option to verilog frontend	Marcus Comstedt	2015-08-01	1	-1/+8
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*	Fixed trailing whitespaces	Clifford Wolf	2015-07-02	1	-2/+2
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*	Verilog front-end: define `BLACKBOX in -lib mode	Clifford Wolf	2015-04-19	1	-1/+2
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*	Added non-std verilog assume() statement	Clifford Wolf	2015-02-26	1	-1/+11
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*	Added "read_verilog -nomeminit" and "nomeminit" attribute	Clifford Wolf	2015-02-14	1	-1/+15
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*	Print "SystemVerilog" in "read_verilog -sv" log messages	Clifford Wolf	2014-10-16	1	-1/+1
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*	namespace Yosys	Clifford Wolf	2014-09-27	1	-16/+16
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*	Removed compatbility.{h,cc}: Not using open_memstream/fmemopen anymore	Clifford Wolf	2014-08-23	1	-4/+1
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*	Changed frontend-api from FILE to std::istream	Clifford Wolf	2014-08-23	1	-6/+6
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*	Added support for global tasks and functions	Clifford Wolf	2014-08-21	1	-4/+4
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*	Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace	Clifford Wolf	2014-07-31	1	-0/+3
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*	Using log_assert() instead of assert()	Clifford Wolf	2014-07-28	1	-1/+0
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*	Added read_verilog -sv options, added support for bit, logic,	Clifford Wolf	2014-06-12	1	-0/+10
\| \| \| \|	allways_ff, always_comb, and always_latch
*	Improved error message for options after front-end filename arguments	Clifford Wolf	2014-06-04	1	-1/+1
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*	Merged OSX fixes from Siesh1oo with some modifications	Clifford Wolf	2014-03-13	1	-0/+1
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*	Added Verilog support for "`default_nettype none"	Clifford Wolf	2014-02-17	1	-1/+2
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*	Added a warning note about error reporting to read_verilog help message	Clifford Wolf	2014-02-16	1	-0/+5
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*	Implemented read_verilog -defer	Clifford Wolf	2014-02-13	1	-1/+11
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*	Added read_verilog -setattr	Clifford Wolf	2014-02-05	1	-0/+15
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*	Added support for blanks after -I and -D in read_verilog	Clifford Wolf	2014-02-02	1	-7/+20
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*	Added read_verilog -icells option	Clifford Wolf	2014-01-29	1	-1/+9
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*	Added verilog_defaults command	Clifford Wolf	2014-01-17	1	-0/+66
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*	Added verilog frontend -ignore_redef option	Clifford Wolf	2013-11-24	1	-1/+10
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*	Renamed "placeholder" to "blackbox"	Clifford Wolf	2013-11-22	1	-1/+1
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*	Enable {* .. *} feature per default (removes dependency to REJECT feature in ↵	Clifford Wolf	2013-11-22	1	-2/+0
\| \| \| \|	flex)
*	Added support for include directories with the new '-I' argument of the	Johann Glaser	2013-08-20	1	-1/+10
\| \| \| \|	'read_verilog' command
*	Improved ast dumping (ast/verilog frontend)	Clifford Wolf	2013-08-19	1	-12/+11
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*	Enabled AST/Verilog front-end optimizations per default	Clifford Wolf	2013-06-10	1	-1/+10
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*	added option '-Dname[=definition]' to command 'read_verilog'	Johann Glaser	2013-05-19	1	-1/+16
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*	Implemented proper handling of stub placeholder modules	Clifford Wolf	2013-03-28	1	-1/+9
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*	Added mem2reg option to verilog frontend	Clifford Wolf	2013-03-24	1	-1/+11
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*	Added help messages to ilang and verilog frontends	Clifford Wolf	2013-03-01	1	-1/+46
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*	Moved stand-alone libs to libs/ directory and added libs/subcircuit	Clifford Wolf	2013-02-27	1	-1/+1
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