index
:
iCE40/yosys
master
[no description]
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
kernel
Commit message (
Expand
)
Author
Age
Files
Lines
...
*
kernel/mem: Add a Mem::narrow helper to split up wide ports.
Marcelina Kościelnicka
2021-05-25
2
-0
/
+53
*
kernel/mem: Emit support for wide ports in packed mode.
Marcelina Kościelnicka
2021-05-25
1
-30
/
+34
*
kernel/mem: Add model for wide ports.
Marcelina Kościelnicka
2021-05-25
2
-6
/
+28
*
kernel/mem: Add priority_mask to model.
Marcelina Kościelnicka
2021-05-25
2
-1
/
+47
*
hashlib: Add a hash for bool.
Marcelina Kościelnicka
2021-05-24
1
-0
/
+6
*
extract_rdff: Add initvals parameter.
Marcelina Kościelnicka
2021-05-23
2
-2
/
+3
*
Add new helper class for merging FFs into cells, use for memory_dff.
Marcelina Kościelnicka
2021-05-23
4
-2
/
+474
*
kernel/rtlil: Extract some helpers for checking memory cell types.
Marcelina Kościelnicka
2021-05-22
2
-0
/
+13
*
kernel/mem: Add a check() function.
Marcelina Kościelnicka
2021-05-22
2
-0
/
+26
*
kernel/mem: defer port removal to emit()
Marcelina Kościelnicka
2021-05-22
2
-18
/
+38
*
rtlil: add const accessors for modules, wires, and cells
Zachary Snow
2021-03-25
2
-0
/
+15
*
split CodingReadme into multiple files
N. Engelhardt
2021-03-22
1
-1
/
+1
*
Merge pull request #2681 from msinger/fix-issue2606
Miodrag Milanović
2021-03-19
1
-3
/
+23
|
\
|
*
Fix check for bad std::regex (fixes #2606)
Michael Singer
2021-03-17
1
-3
/
+23
*
|
modtools: fix use-after-free of cell pointers in ModWalker
Xiretza
2021-03-18
1
-0
/
+2
|
/
*
blackbox: Include whiteboxed modules
gatecat
2021-03-17
2
-3
/
+3
*
Replace assert in get_reference with more useful error message
Lofty
2021-03-17
1
-1
/
+2
*
rtlil: Disallow 0-width chunks in SigSpec.
Marcelina Kościelnicka
2021-03-15
1
-18
/
+49
*
Add support for memory writes in processes.
Marcelina Kościelnicka
2021-03-08
2
-0
/
+22
*
Remove a few functions that, in fact, did not exist in the first place.
Marcelina Kościelnicka
2021-03-06
1
-2
/
+0
*
Replace assert in addModule with more useful error message
Dan Ravensloft
2021-03-06
1
-1
/
+2
*
Fix double-free on unmatched logger error pattern
Zachary Snow
2021-02-23
1
-3
/
+3
*
int -> bool
Robert Baruch
2021-02-23
1
-2
/
+2
*
Adds is_wire to SigBit and SigChunk
Robert Baruch
2021-02-23
1
-0
/
+3
*
verilog: significant block scoping improvements
Zachary Snow
2021-01-31
1
-0
/
+4
*
kernel/yosys.h: undef CONST on WIN32
umarcor
2020-12-28
1
-2
/
+3
*
kernel: undef Tcl macros interfering with cxxrtl.
whitequark
2020-12-22
1
-0
/
+2
*
Merge pull request #2487 from whitequark/cxxrtl-outlining
whitequark
2020-12-19
1
-1
/
+1
|
\
|
*
kernel: make IdString::isPublic() const.
whitequark
2020-12-12
1
-1
/
+1
*
|
timinginfo: Error instead of segfault on const signals.
Marcelina Kościelnicka
2020-12-15
1
-2
/
+2
|
/
*
bugpoint: add -wires option.
whitequark
2020-12-07
1
-1
/
+1
*
tcl -h message only if YOSYS_ENABLE_TCL defined.
nitz
2020-11-23
1
-0
/
+2
*
Expose abc and data paths as globals
Miodrag Milanovic
2020-11-06
2
-14
/
+61
*
Add new helper structures to represent memories.
Marcelina Kościelnicka
2020-10-21
2
-0
/
+514
*
add IdString::isPublic()
N. Engelhardt
2020-09-03
1
-0
/
+2
*
Replace "ILANG" with "RTLIL" everywhere.
whitequark
2020-08-26
3
-10
/
+10
*
Ensure \A_SIGNED is never used with $shiftx
Xiretza
2020-08-18
1
-1
/
+5
*
Respect \A_SIGNED for $shift
Xiretza
2020-08-18
2
-42
/
+22
*
async2sync: Support all FF types.
Marcelina Kościelnicka
2020-07-30
1
-0
/
+46
*
ffinit: Fortify the code a bit.
Marcelina Kościelnicka
2020-07-28
1
-24
/
+19
*
satgen: Add support for dffe, sdff, sdffe, sdffce cells.
Marcelina Kościelnicka
2020-07-24
2
-4
/
+67
*
Add utility module for representing flip-flops.
Marcelina Kościelnicka
2020-07-23
1
-0
/
+440
*
Add utility module for dealing with init attributes.
Marcelina Kościelnicka
2020-07-23
1
-0
/
+146
*
techmap: Add _TECHMAP_CELLNAME_ special parameter.
Marcelina Kościelnicka
2020-07-21
1
-0
/
+1
*
celltypes: Fix EN port name for some FF types.
Marcelina Kościelnicka
2020-07-20
1
-4
/
+4
*
satgen: Move importCell out of the header.
Marcelina Kościelnicka
2020-07-19
2
-1165
/
+1189
*
verilog_backend: add `-sv` option, make `-o <filename>.sv` work.
whitequark
2020-07-16
1
-0
/
+2
*
Merge pull request #2168 from whitequark/assert-unused-exprs
clairexen
2020-06-25
4
-9
/
+14
|
\
|
*
Use [[maybe_unused]] instead of YS_ATTRIBUTE(unused).
whitequark
2020-06-19
1
-0
/
+8
|
*
Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug().
whitequark
2020-06-19
2
-4
/
+4
[prev]
[next]