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* Cleanup ecp5 boxesEddie Hung2019-12-314-35/+31
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* Nitpick cleanup for ecp5Eddie Hung2019-12-272-11/+3
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* Revert "Optimise write_xaiger"Eddie Hung2019-12-201-5/+0
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* Merge pull request #1558 from YosysHQ/eddie/xaiger_cleanupEddie Hung2019-12-191-0/+5
|\ | | | | Optimise write_xaiger
| * techmap/aigmap of whiteboxes to occur before abc9 instead of in write_xaigerEddie Hung2019-12-061-0/+5
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* | Merge pull request #1563 from YosysHQ/dave/async-prldDavid Shah2019-12-182-4/+28
|\ \ | | | | | | ecp5: Add support for mapping PRLD FFs
| * | ecp5: Add support for mapping PRLD FFsDavid Shah2019-12-072-4/+28
| |/ | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* / Fix bitwidth mismatch; suppresses iverilog warningEddie Hung2019-12-111-4/+4
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* ecp5: Use new autoname pass for better cell/net namesDavid Shah2019-11-151-0/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Pass -nomfs to abc9David Shah2019-10-201-2/+2
| | | | | | Fixes #1459 Signed-off-by: David Shah <dave@ds0.me>
* Makefile: don't assume python is called `python3`Sean Cross2019-10-191-2/+2
| | | | | | | | | | | | | | | | On some architectures, notably on Windows, the official name for the Python binary from python.org is `python`. The build system assumes that python is called `python3`, which breaks under this architecture. There is already infrastructure in place to determine the name of the Python binary when building PYOSYS. Since Python is now always required to build Yosys, enable this check universally which sets the `PYTHON_EXECUTABLE` variable. Then, reuse this variable in other Makefiles as necessary, rather than hardcoding `python3` everywhere. Signed-off-by: Sean Cross <sean@xobs.io>
* ecp5: Add ECLKBRIDGECS blackboxDavid Shah2019-10-111-0/+7
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add attrmvcp to copy syn_useioff to driving FFDavid Shah2019-10-101-0/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Set syn_useioff on IO FFs to enable packingDavid Shah2019-10-101-8/+8
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Rename abc_* names/attributes to more precisely be abc9_*Eddie Hung2019-10-0410-25/+25
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* Panic over. Model was elsewhere. Re-arrange for consistencyEddie Hung2019-10-041-0/+1
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* ecp5: Fix shuffle_enable portDavid Shah2019-10-011-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ecp5: Add support for mapping 36-bit wide PDP BRAMsDavid Shah2019-10-016-1/+183
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Combine 'flatten' & 'coarse' labels in synth_ecp5 so proc run onceEddie Hung2019-09-261-9/+4
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* Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-057-14/+53
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| * Rename boxEddie Hung2019-09-021-1/+1
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| * Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-09-022-7/+8
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| * \ Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-307-106/+147
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| * \ \ Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-286-54/+212
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| * | | | Fix spacingEddie Hung2019-08-231-1/+1
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| * | | | Remove unused modelEddie Hung2019-08-231-13/+0
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| * | | | Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-231-3/+6
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| * | | | | ecp5: remove DPR16X4 from abc_unmap.vEddie Hung2019-08-201-20/+0
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| * | | | | ecp5 to use -max_iter 1Eddie Hung2019-08-203-4/+3
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| * | | | | ecp5 to use abc_map.v and _unmap.vEddie Hung2019-08-207-14/+89
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* | | | | | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-042-7/+8
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| * | | | | Fix TRELLIS_FF simulation modelMiodrag Milanovic2019-08-311-6/+7
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| * | | | | ecp5_gsr: Fix typoDavid Shah2019-08-311-1/+1
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* | | | | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-08-307-106/+147
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| * | | | ecp5: Add simulation equivalence check for Diamond FF implementationsDavid Shah2019-08-303-0/+87
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | | | ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives.whitequark2019-08-305-95/+60
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| * | | | ecp5: allow (and enable by default) GSR on FD/IFS/OFS primitives.whitequark2019-08-301-35/+20
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| * | | | ecp5: add missing FD primitives.whitequark2019-08-302-72/+76
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| * | | | ecp5: fix CEMUX on IFS/OFS primitives.whitequark2019-08-302-18/+18
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* | | | Merge branch 'master' into xc7dspDavid Shah2019-08-307-63/+230
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| * | | ecp5: Add GSR supportDavid Shah2019-08-276-54/+212
| | |/ | |/| | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | Put abc_* attributes above portEddie Hung2019-08-231-5/+10
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| * Unify abc_carry_{in,out} into abc_carry and use port dir, as @mithroEddie Hung2019-08-191-2/+2
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| * Update abc_* attr in ecp5 and ice40Eddie Hung2019-08-161-9/+13
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* | ecp5: Replace '-dsp' with inverse logic '-nodsp' to match synth_xilinxDavid Shah2019-08-081-11/+11
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | ecp5: Bring up to date with mul2dsp changesDavid Shah2019-08-082-2/+10
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-08-071-101/+244
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| * ecp5: Make cells_sim.v consistent with nextpnrDavid Shah2019-08-071-101/+244
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Merge remote-tracking branch 'origin/master' into ice40dspEddie Hung2019-07-184-15/+19
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| * synth_ecp5: rename dram to lutram everywhere.whitequark2019-07-164-13/+13
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