| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | intel_alm: direct M10K instantiation | Dan Ravensloft | 2020-07-05 | 1 | -1/+2 |
| * | intel_alm: DSP inference | Dan Ravensloft | 2020-07-05 | 1 | -9/+49 |
| * | synth_intel_alm: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-04 | 1 | -4/+3 |
| * | intel_alm: add $__ prefix to MISTRAL_FF_SYNCONLY | Eddie Hung | 2020-07-04 | 1 | -1/+1 |
| * | intel_alm: ABC9 sequential optimisations | Dan Ravensloft | 2020-07-04 | 1 | -9/+20 |
| * | Use C++11 final/override keywords. | whitequark | 2020-06-18 | 1 | -4/+4 |
| * | intel_alm: fix DFFE matching | Dan Ravensloft | 2020-06-11 | 1 | -1/+1 |
| * | synth_*: no need to explicitly read +/abc9_model.v | Eddie Hung | 2020-05-14 | 1 | -1/+0 |
| * | intel_alm: direct LUTRAM cell instantiation | Dan Ravensloft | 2020-05-07 | 1 | -1/+1 |
| * | intel_alm: cleanup duplication | Dan Ravensloft | 2020-04-24 | 1 | -2/+1 |
| * | intel_alm: work around a Quartus ICE | Dan Ravensloft | 2020-04-23 | 1 | -0/+10 |
| * | synth_intel_alm: VQM support | Dan Ravensloft | 2020-04-15 | 1 | -0/+1 |
| * | synth_intel_alm: alternative synthesis for Intel FPGAs | Dan Ravensloft | 2020-04-15 | 1 | -0/+240 |
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