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* Pack partial-product adder DSP48E1 packingEddie Hung2019-08-091-0/+2
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* Combine techmap callsEddie Hung2019-08-081-2/+1
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* Move xilinx_dsp to before alumaccEddie Hung2019-08-081-6/+4
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* Change $__softmul back to $mulEddie Hung2019-08-011-0/+1
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* Use single DSP_SIGNEDONLY macroEddie Hung2019-07-181-1/+1
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* Update commentEddie Hung2019-07-171-5/+3
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* Revert drop down to 24x16 multipliers for allEddie Hung2019-07-161-1/+1
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* Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dspEddie Hung2019-07-161-1/+5
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| * xilinx: Treat DSP48E1 as 24x17 unsigned for now (actual behaviour is 25x18 ↵David Shah2019-07-161-1/+5
| | | | | | | | | | | | signed) Signed-off-by: David Shah <dave@ds0.me>
* | Oops forgot these filesEddie Hung2019-07-151-0/+4
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* Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-07-151-5/+20
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| * synth_xilinx: Initial Spartan 6 block RAM inference support.Marcin Kościelnicki2019-07-111-5/+20
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* | Move dsp_map.v into cells_map.v; cleanup synth_xilinx a littleEddie Hung2019-07-101-4/+1
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* | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-07-101-43/+58
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| * Merge pull request #1180 from YosysHQ/eddie/no_abc9_retimeEddie Hung2019-07-101-5/+8
| |\ | | | | | | Error out if -abc9 and -retime specified
| | * Error out if -abc9 and -retime specifiedEddie Hung2019-07-101-5/+8
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| | * Remove peepopt call in synth_xilinx since already in synth -run coarseEddie Hung2019-06-281-5/+0
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| * | Call muxpack and pmux2shiftx before cmp2lutEddie Hung2019-07-091-9/+12
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| * | Restore opt_clean back to original placeEddie Hung2019-07-091-2/+1
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| * | Restore missing techmap -map +/cmp2lut.v with LUT_WIDTH=6Eddie Hung2019-07-091-0/+2
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| * | synth_xilinx to call commands of synth -coarse directlyEddie Hung2019-07-091-3/+20
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| * | Revert "synth_xilinx to call "synth -run coarse" with "-keepdc""Eddie Hung2019-07-091-2/+2
| | | | | | | | | | | | This reverts commit 7f964859ec99500e471853f5914b6e5b7c35a031.
| * | Fix spacingEddie Hung2019-07-091-1/+1
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| * | Fix spacingEddie Hung2019-07-091-1/+1
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| * | Do not call opt -mux_undef (part of -full) before muxcoverEddie Hung2019-07-081-1/+5
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| * | synth_xilinx to call "synth -run coarse" with "-keepdc"Eddie Hung2019-07-081-2/+2
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| * | CapitalisationEddie Hung2019-07-081-1/+1
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| * | Add synth_xilinx -widemux recommended valueEddie Hung2019-07-081-1/+1
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| * | Fixes for 2:1 muxesEddie Hung2019-07-081-1/+1
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| * | synth_xilinx -widemux=2 is minimum nowEddie Hung2019-07-081-4/+7
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| * | Parametric muxcover costs as per @daveshah1Eddie Hung2019-07-081-16/+14
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| * | atoi -> stoi as per @daveshah1Eddie Hung2019-07-081-1/+1
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* | | xc7: Map combinational DSP48E1sDavid Shah2019-07-081-5/+34
|/ / | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-281-3/+0
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| * Remove redundant docEddie Hung2019-06-271-3/+0
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* | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-271-7/+10
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| * Add warning if synth_xilinx -abc9 with family != xc7Eddie Hung2019-06-271-0/+2
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| * Merge origin/masterEddie Hung2019-06-271-7/+8
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* | synth_xilinx's muxcover call to be very conservative -- -nodecodeEddie Hung2019-06-261-1/+1
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* | Accidentally removed "simplemap $mux"Eddie Hung2019-06-261-0/+1
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* | Replace with <internal options>Eddie Hung2019-06-261-2/+2
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* | Rework help_mode for synth_xilinx -widemuxEddie Hung2019-06-261-22/+23
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* | Return to upstream synth_xilinx with opt -full and wreduceEddie Hung2019-06-261-19/+3
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* | Instead of blocking wreduce on $mux, use -keepdc instead #1132Eddie Hung2019-06-261-2/+2
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* | Do not call opt with -full before muxcoverEddie Hung2019-06-261-1/+1
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* | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-261-1/+1
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| * Remove unused varEddie Hung2019-06-261-1/+1
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* | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-261-11/+35
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| * Add _nowide variants of LUT libraries in -nowidelut flowsEddie Hung2019-06-261-12/+18
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| * Merge branch 'koriakin/xc7nocarrymux' into xaigEddie Hung2019-06-261-2/+20
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