iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
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*	Fixed trailing whitespaces	Clifford Wolf	2015-07-02	1	-3/+3
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*	Added output args to synth_ice40	Clifford Wolf	2015-05-26	1	-2/+2
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*	Towards DRAM support in Xilinx flow	Clifford Wolf	2015-04-09	1	-0/+12
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*	Added Xilinx bram black-box modules	Clifford Wolf	2015-04-06	1	-0/+2
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*	Added "dffinit", Support for initialized Xilinx DFF	Clifford Wolf	2015-04-04	1	-5/+6
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*	Added "stat" to "synth" and "synth_xilinx"	Clifford Wolf	2015-02-15	1	-0/+2
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*	Added final checks to "synth" and "synth_xilinx"	Clifford Wolf	2015-02-15	1	-0/+10
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*	no support for 6-series xilinx devices	Clifford Wolf	2015-02-01	1	-1/+1
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*	Added Xilinx example for Basys3 board	Clifford Wolf	2015-02-01	1	-0/+2
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*	Various cleanups in xilinx techlib	Clifford Wolf	2015-01-18	1	-6/+6
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*	Added synth_xilinx -retime -flatten	Clifford Wolf	2015-01-17	1	-2/+28
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*	Added MUXCY and XORCY support to synth_xilinx	Clifford Wolf	2015-01-17	1	-2/+10
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*	Added dff2dffe to synth_xilinx	Clifford Wolf	2015-01-16	1	-0/+2
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*	Added Xilinx MUXF7 and MUXF8 support	Clifford Wolf	2015-01-15	1	-2/+2
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*	Various cleanups in synth_xilinx command	Clifford Wolf	2015-01-13	1	-54/+8
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*	Various small improvements to synth_xilinx	Clifford Wolf	2015-01-06	1	-8/+6
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*	Towards Xilinx bram support	Clifford Wolf	2015-01-05	1	-16/+20
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*	namespace Yosys	Clifford Wolf	2014-09-27	1	-1/+5
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*	Added "techmap -share_map" option	Clifford Wolf	2013-11-24	1	-4/+4
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*	Added synth_xilinx command	Clifford Wolf	2013-10-27	1	-0/+210