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| * | | | | | | | | | | | | | | Fix spacingEddie Hung2019-06-211-15/+15
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| * | | | | | | | | | | | | | | synth_xilinx to use _ABC macro, and perform muxpack againEddie Hung2019-06-211-5/+5
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| * | | | | | | | | | | | | | | Add $__XILINX_MUXF78 to preserve entire boxEddie Hung2019-06-213-7/+28
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| * | | | | | | | | | | | | | | Fix alignmentEddie Hung2019-06-211-1/+1
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| * | | | | | | | | | | | | | | Add FIXME about need for -mux4Eddie Hung2019-06-211-0/+2
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| * | | | | | | | | | | | | | | Since muxcover uses MUX4s, blast them back to gates hereEddie Hung2019-06-211-0/+7
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| * | | | | | | | | | | | | | | Expand synth -coarse without wreduce, move muxcoverEddie Hung2019-06-211-12/+24
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| * | | | | | | | | | | | | | | Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abcEddie Hung2019-06-201-0/+1
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| * | | | | | | | | | | | | | | mux_map to drop sign bit, and eliminate 'bx-esEddie Hung2019-06-201-13/+47
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| * | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-201-1/+1
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-181-29/+27
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-182-37/+37
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-171-9/+8
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-172-33/+59
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-171-5/+5
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| * | | | | | | | | | | | | | | | | | | | | Try -W 300Eddie Hung2019-06-161-1/+2
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| * | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-151-2/+2
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| * | | | | | | | | | | | | | | | | | | | | | Revert "Remove wide mux inference"Eddie Hung2019-06-144-3/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 738fdfe8f55e18ac7f315cd68c117eae370004ca.
* | | | | | | | | | | | | | | | | | | | | | | synth_ecp5: Fix typo in copyright headerDavid Shah2019-07-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | | | | | | | | | | | | | | | | | | | | | Revert "Add "synth -keepdc" option"Eddie Hung2019-07-091-13/+2
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* | | | | | | | | | | | | | | | | | | | | | Merge pull request #1167 from YosysHQ/eddie/xc7srl_cleanupClifford Wolf2019-07-091-19/+25
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge branch 'eddie/script_from_wire' into eddie/xc7srl_cleanupEddie Hung2019-07-022-0/+3
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| * | | | | | | | | | | | | | | | | | | | | | Cleanup SRL inference/make more consistentEddie Hung2019-06-291-19/+25
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* | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1166 from YosysHQ/eddie/synth_keepdcEddie Hung2019-07-081-2/+13
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| * | | | | | | | | | | | | | | | | | | | | | Add synth -keepdc optionEddie Hung2019-07-081-2/+13
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* / | | | | | | | | | | | | | | | | | | | | synth_intel: Warn about untested Quartus backendDan Ravensloft2019-07-071-0/+3
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* / / / / / / / / / / / / / / / / / / / / install *_nowide.lut filesEddie Hung2019-06-292-0/+3
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* | | | | | | | | | | | | | | | | | | / Remove peepopt call in synth_xilinx since already in synth -run coarseEddie Hung2019-06-281-5/+0
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* | | | | | | | | | | | | | | | | | | Update synth_ice40 -device doc to be relevant for -abc9 onlyEddie Hung2019-06-281-2/+2
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* | | | | | | | | | | | | | | | | | | Disable boxing of ECP5 dist RAM due to regressionEddie Hung2019-06-281-1/+1
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* | | | | | | | | | | | | | | | | | | Add write address to abc_scc_break of ECP5 dist RAMEddie Hung2019-06-281-1/+1
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* | | | | | | | | | | | | | | | | | | Fix DO4 typoEddie Hung2019-06-281-1/+1
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* | | | | | | | | | | | | | | | | | | Reduce diff with upstreamEddie Hung2019-06-271-4/+2
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* | | | | | | | | | | | | | | | | | | Extraneous newlineEddie Hung2019-06-271-1/+0
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* | | | | | | | | | | | | | | | | | | Remove noise from ice40/cells_sim.vEddie Hung2019-06-271-5/+0
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* | | | | | | | | | | | | | | | | | | Refactor for one "abc_carry" attribute on moduleEddie Hung2019-06-273-9/+7
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* | | | | | | | | | | | | | | | | | | Remove redundant docEddie Hung2019-06-271-3/+0
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* | | | | | | | | | | | | | | | | | Add warning if synth_xilinx -abc9 with family != xc7Eddie Hung2019-06-271-0/+2
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* | | | | | | | | | | | | | | | | | Merge origin/masterEddie Hung2019-06-274-51/+100
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* | | | | | | | | | | | | | | | | Add WE to ECP5 dist RAM's abc_scc_break tooEddie Hung2019-06-261-1/+1
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* | | | | | | | | | | | | | | | | Update comment on boxesEddie Hung2019-06-262-4/+6
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* | | | | | | | | | | | | | | | | Add "WE" to dist RAM's abc_scc_breakEddie Hung2019-06-261-3/+3
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* | | | | | | | | | | | | | | | Remove unused varEddie Hung2019-06-261-1/+1
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* | | | | | | | | | | | | | | Add _nowide variants of LUT libraries in -nowidelut flowsEddie Hung2019-06-264-13/+44
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* | | | | | | | | | | | | | | Merge branch 'xaig' of github.com:YosysHQ/yosys into xaigEddie Hung2019-06-261-2/+10
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| * | | | | | | | | | | | | | abc9: Add wire delays to synth_ice40David Shah2019-06-261-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | | | | | | | | | | | | | Merge branch 'koriakin/xc7nocarrymux' into xaigEddie Hung2019-06-262-9/+26
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| * | | | | | | | | | | | | | synth_ecp5 rename -nomux to -nowidelut, but preserve formerEddie Hung2019-06-261-6/+6
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| * | | | | | | | | | | | | | Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into ↵Eddie Hung2019-06-261-4/+24
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| | * | | | | | | | | | | | | synth_xilinx: Add -nocarry and -nomux options.Marcin Kościelnicki2019-04-301-7/+26
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