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| | * | | | | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-06 | 4 | -3/+302 | |
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| | * | | | | | | abc9_map.v to transform INIT=1 to INIT=0 | Eddie Hung | 2019-12-04 | 1 | -0/+91 | |
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| * | | | | | | | Add testcase from #1459 | Eddie Hung | 2020-01-06 | 1 | -0/+25 | |
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| * | | | | | | Merge pull request #1606 from YosysHQ/eddie/improve_tests | Eddie Hung | 2020-01-01 | 9 | -11/+12 | |
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | Fix a few issues in tests/arch/* | |||||
| | * | | | | | | Revert insertion of 'reg', leave note behind | Eddie Hung | 2020-01-01 | 1 | -1/+2 | |
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| | * | | | | | | Do not do call equiv_opt when no sim model exists | Eddie Hung | 2019-12-31 | 2 | -4/+4 | |
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| | * | | | | | | Fix warnings | Eddie Hung | 2019-12-31 | 2 | -2/+2 | |
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| | * | | | | | | Call equiv_opt with -multiclock and -assert | Eddie Hung | 2019-12-31 | 5 | -5/+5 | |
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| * / | | | | | Added a test case | Miodrag Milanovic | 2020-01-01 | 1 | -0/+19 | |
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| * | | | | | Merge pull request #1589 from YosysHQ/iopad_default | Miodrag Milanović | 2019-12-30 | 19 | -60/+61 | |
| |\ \ \ \ \ | | | | | | | | | | | | | Make iopad option default for all xilinx flows | |||||
| | * | | | | | Fix new tests | Miodrag Milanovic | 2019-12-28 | 3 | -6/+6 | |
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| | * | | | | | Merge remote-tracking branch 'origin/master' into iopad_default | Miodrag Milanovic | 2019-12-28 | 4 | -0/+118 | |
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| | * | | | | | | Make test without iopads | Miodrag Milanovic | 2019-12-28 | 17 | -51/+51 | |
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| | * | | | | | | Revert "Fix xilinx tests, when iopads are default" | Miodrag Milanovic | 2019-12-28 | 16 | -40/+40 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 477e43d921d204c6bc6403109fea6506802c948c. | |||||
| | * | | | | | | Addressed review comments | Miodrag Milanovic | 2019-12-21 | 1 | -1/+0 | |
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| | * | | | | | | Fix xilinx tests, when iopads are default | Miodrag Milanovic | 2019-12-21 | 17 | -42/+44 | |
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| * | | | | | | Merge pull request #1599 from YosysHQ/eddie/retry_1588 | Eddie Hung | 2019-12-30 | 3 | -0/+48 | |
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | Retry #1588 -- "write_xaiger: only instantiate each whitebox cell type once" | |||||
| | * | | | | | | Add #1598 testcase | Eddie Hung | 2019-12-27 | 3 | -0/+48 | |
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| * / | | | | | Update resource count | Eddie Hung | 2019-12-28 | 1 | -3/+3 | |
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| * | | | | | Add DSP cascade tests | Eddie Hung | 2019-12-23 | 1 | -0/+89 | |
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| * | | | | | xilinx_dsp: Initial DSP48A/DSP48A1 support. | Marcin Kościelnicki | 2019-12-22 | 3 | -0/+29 | |
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| * | | | | tests/xilinx: fix flaky mux test | Marcin Kościelnicki | 2019-12-18 | 1 | -2/+4 | |
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| * | | | | xilinx: Add xilinx_dffopt pass (#1557) | Marcin Kościelnicki | 2019-12-18 | 3 | -3/+232 | |
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| * | | | | xilinx: Improve flip-flop handling. | Marcin Kościelnicki | 2019-12-18 | 3 | -11/+12 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for infering more kinds of flip-flops: - FFs with async set/reset and clock enable - FFs with sync set/reset - FFs with sync set/reset and clock enable Some passes have been moved (and some added) in order for dff2dffs to work correctly. This gives us complete coverage of Virtex 6+ and Spartan 6 flip-flop capabilities (though not latch capabilities). Older FPGAs also support having both a set and a reset input, which will be handled at a later data. | |||||
| * | | | | Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram | Eddie Hung | 2019-12-16 | 10 | -53/+228 | |
| |\ \ \ \ | | | | | | | | | | | xilinx: add LUTRAM rules for RAM32M, RAM64M | |||||
| | * | | | | Disable RAM16X1D test | Eddie Hung | 2019-12-13 | 1 | -17/+17 | |
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| | * | | | | Remove extraneous synth_xilinx call | Eddie Hung | 2019-12-12 | 1 | -2/+0 | |
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| | * | | | | Add tests for these new models | Eddie Hung | 2019-12-12 | 1 | -0/+40 | |
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| | * | | | | Add #1460 testcase | Eddie Hung | 2019-12-12 | 1 | -0/+34 | |
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| | * | | | | Rename memory tests to lutram, add more xilinx tests | Eddie Hung | 2019-12-12 | 9 | -53/+156 | |
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| * | | | | Add another test | Eddie Hung | 2019-12-16 | 1 | -1/+8 | |
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| * | | | | Accidentally commented out tests | Eddie Hung | 2019-12-16 | 1 | -47/+47 | |
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| * | | | | Add unconditional match blocks for force RAM | Eddie Hung | 2019-12-16 | 1 | -0/+9 | |
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| * | | | | Merge blockram tests | Eddie Hung | 2019-12-16 | 3 | -47/+81 | |
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| * | | | | Fixing compiler warning/issues. Moving test script to the correct place | Diego H | 2019-12-16 | 1 | -6/+6 | |
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| * | | | | Removing fixed attribute value to !ramstyle rules | Diego H | 2019-12-15 | 1 | -3238/+0 | |
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| * | | | | Merging attribute rules into a single match block; Adding tests | Diego H | 2019-12-15 | 3 | -0/+3373 | |
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| * | | | | Renaming BRAM memory tests for the sake of uniformity | Diego H | 2019-12-13 | 2 | -6/+6 | |
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| * | | | | Fixing citation in xc7_xcu_brams.txt file. Fixing RAMB36E1 test. | Diego H | 2019-12-12 | 1 | -2/+2 | |
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| * | | | | Adding a note (TODO) in the memory_params.ys check file | Diego H | 2019-12-12 | 1 | -0/+2 | |
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| * | | | | Updating RAMB36E1 thresholds. Adding test for both RAMB18E1/RAMB36E1 | Diego H | 2019-12-12 | 2 | -0/+90 | |
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| * | | | Merge pull request #1545 from YosysHQ/eddie/ice40_wrapcarry_attr | Eddie Hung | 2019-12-09 | 3 | -23/+136 | |
| |\ \ \ | |_|/ |/| | | Preserve SB_CARRY name and attributes when using $__ICE40_CARRY_WRAPPER | |||||
| | * | | unmap $__ICE40_CARRY_WRAPPER in test | Eddie Hung | 2019-12-09 | 1 | -1/+21 | |
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| | * | | ice40_wrapcarry to really preserve attributes via -unwrap option | Eddie Hung | 2019-12-09 | 1 | -3/+5 | |
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| | * | | Drop keep=0 attributes on SB_CARRY | Eddie Hung | 2019-12-06 | 1 | -2/+2 | |
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| | * | | Add WIP test for unwrapping $__ICE40_CARRY_WRAPPER | Eddie Hung | 2019-12-05 | 1 | -0/+30 | |
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| | * | | Check SB_CARRY name also preserved | Eddie Hung | 2019-12-03 | 1 | -0/+1 | |
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| | * | | Add testcase | Eddie Hung | 2019-12-03 | 1 | -0/+60 | |
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| * | | | tests: arch: xilinx: Change order of arguments in macc.sh | Jan Kowalewski | 2019-12-06 | 1 | -1/+1 | |
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| * | | Merge pull request #1524 from pepijndevos/gowindffinit | Clifford Wolf | 2019-12-03 | 3 | -2/+301 | |
| |\ \ | |/ |/| | Gowin: add and test DFF init values | |||||
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