/* * Copyright 1996-2002 - Karl R. Hakimian and David Fries * * This file is part of datalink. * * Datalink is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * Datalink is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with datalink (see COPYING); if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * */ #include #include #include "datalink.h" #include "datalink_private.h" void dl_free_download() { /* Free up old download structure if it exists. */ if (dl_download_data.times) free(dl_download_data.times); if (dl_download_data.alarms) free(dl_download_data.alarms); if (dl_download_data.timers) free(dl_download_data.timers); if (dl_download_data.apps) free(dl_download_data.apps); if (dl_download_data.chron) free(dl_download_data.chron); if (dl_download_data.phones) free(dl_download_data.phones); if (dl_download_data.todos) free(dl_download_data.todos); if (dl_download_data.annivs) free(dl_download_data.annivs); if (dl_download_data.system) free(dl_download_data.system); if (dl_download_data.wristapp) free(dl_download_data.wristapp); if (dl_download_data.melody) free(dl_download_data.melody); memset((char *) &dl_download_data, 0, sizeof(Download)); } 20df7f0da7'>diffstats
path: root/techlibs/ecp5/brams_connect.py
blob: f86dcfcf0728e5ba4a2481fe59146aa560fae04f (plain) 
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#!/usr/bin/env python3

def write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits):
    ada_conn = [".ADA%d(%s)" % (i, ada_bits[i]) for i in range(len(ada_bits))]
    adb_conn = [".ADB%d(%s)" % (i, adb_bits[i]) for i in range(len(adb_bits))]
    dia_conn = [".DIA%d(%s)" % (i, dia_bits[i]) for i in range(len(dia_bits))]
    dob_conn = [".DOB%d(%s)" % (i, dob_bits[i]) for i in range(len(dob_bits))]
    print("    %s," % ", ".join(ada_conn), file=f)
    print("    %s," % ", ".join(adb_conn), file=f)
    print("    %s," % ", ".join(dia_conn), file=f)
    print("    %s," % ", ".join(dob_conn), file=f)

with open("techlibs/ecp5/bram_conn_1.vh", "w") as f:
    ada_bits = ["A1ADDR[%d]" % i for i in range(14)]
    adb_bits = ["B1ADDR[%d]" % i for i in range(14)]
    dia_bits = ["A1DATA[0]"] + ["1'b0" for i in range(17)]
    dob_bits = ["B1DATA[0]"]
    write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits)

with open("techlibs/ecp5/bram_conn_2.vh", "w") as f:
    ada_bits = ["1'b0"] + ["A1ADDR[%d]" % i for i in range(13)]
    adb_bits = ["1'b0"] + ["B1ADDR[%d]" % i for i in range(13)]
    dia_bits = ["A1DATA[%d]" % i for i in range(2)] + ["1'b0" for i in range(16)]
    dob_bits = ["B1DATA[%d]" % i for i in range(2)]
    write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits)

with open("techlibs/ecp5/bram_conn_4.vh", "w") as f:
    ada_bits = ["1'b0", "1'b0"] + ["A1ADDR[%d]" % i for i in range(12)]
    adb_bits = ["1'b0", "1'b0"] + ["B1ADDR[%d]" % i for i in range(12)]
    dia_bits = ["A1DATA[%d]" % i for i in range(4)] + ["1'b0" for i in range(14)]
    dob_bits = ["B1DATA[%d]" % i for i in range(4)]
    write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits)

with open("techlibs/ecp5/bram_conn_9.vh", "w") as f:
    ada_bits = ["1'b0", "1'b0", "1'b0"] + ["A1ADDR[%d]" % i for i in range(11)]
    adb_bits = ["1'b0", "1'b0", "1'b0"] + ["B1ADDR[%d]" % i for i in range(11)]
    dia_bits = ["A1DATA[%d]" % i for i in range(9)] + ["1'b0" for i in range(9)]
    dob_bits = ["B1DATA[%d]" % i for i in range(9)]
    write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits)

with open("techlibs/ecp5/bram_conn_18.vh", "w") as f:
    ada_bits = ["A1EN[0]", "A1EN[1]", "1'b0", "1'b0"] + ["A1ADDR[%d]" % i for i in range(10)]
    adb_bits = ["1'b0", "1'b0", "1'b0", "1'b0"] + ["B1ADDR[%d]" % i for i in range(10)]
    dia_bits = ["A1DATA[%d]" % i for i in range(18)]
    dob_bits = ["B1DATA[%d]" % i for i in range(18)]
    write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits)
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-25 16:20:52 +0000