diff options
Diffstat (limited to 'arch/arm/mach-rpc')
-rw-r--r-- | arch/arm/mach-rpc/Makefile | 11 | ||||
-rw-r--r-- | arch/arm/mach-rpc/Makefile.boot | 4 | ||||
-rw-r--r-- | arch/arm/mach-rpc/dma.c | 389 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/acornfb.h | 140 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/debug-macro.S | 23 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/entry-macro.S | 16 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/hardware.h | 83 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/io.h | 213 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/irqs.h | 47 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/isa-dma.h | 29 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/memory.h | 40 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/system.h | 27 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/timex.h | 17 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/uncompress.h | 196 | ||||
-rw-r--r-- | arch/arm/mach-rpc/include/mach/vmalloc.h | 10 | ||||
-rw-r--r-- | arch/arm/mach-rpc/irq.c | 162 | ||||
-rw-r--r-- | arch/arm/mach-rpc/riscpc.c | 227 |
17 files changed, 1634 insertions, 0 deletions
diff --git a/arch/arm/mach-rpc/Makefile b/arch/arm/mach-rpc/Makefile new file mode 100644 index 00000000..aa77bc9e --- /dev/null +++ b/arch/arm/mach-rpc/Makefile @@ -0,0 +1,11 @@ +# +# Makefile for the linux kernel. +# + +# Object file lists. + +obj-y := dma.o irq.o riscpc.o +obj-m := +obj-n := +obj- := + diff --git a/arch/arm/mach-rpc/Makefile.boot b/arch/arm/mach-rpc/Makefile.boot new file mode 100644 index 00000000..9c9e7685 --- /dev/null +++ b/arch/arm/mach-rpc/Makefile.boot @@ -0,0 +1,4 @@ + zreladdr-y := 0x10008000 +params_phys-y := 0x10000100 +initrd_phys-y := 0x18000000 + diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c new file mode 100644 index 00000000..85883b2e --- /dev/null +++ b/arch/arm/mach-rpc/dma.c @@ -0,0 +1,389 @@ +/* + * linux/arch/arm/mach-rpc/dma.c + * + * Copyright (C) 1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * DMA functions specific to RiscPC architecture + */ +#include <linux/mman.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/dma-mapping.h> +#include <linux/io.h> + +#include <asm/page.h> +#include <asm/dma.h> +#include <asm/fiq.h> +#include <asm/irq.h> +#include <mach/hardware.h> +#include <asm/uaccess.h> + +#include <asm/mach/dma.h> +#include <asm/hardware/iomd.h> + +struct iomd_dma { + struct dma_struct dma; + unsigned int state; + unsigned long base; /* Controller base address */ + int irq; /* Controller IRQ */ + struct scatterlist cur_sg; /* Current controller buffer */ + dma_addr_t dma_addr; + unsigned int dma_len; +}; + +#if 0 +typedef enum { + dma_size_8 = 1, + dma_size_16 = 2, + dma_size_32 = 4, + dma_size_128 = 16 +} dma_size_t; +#endif + +#define TRANSFER_SIZE 2 + +#define CURA (0) +#define ENDA (IOMD_IO0ENDA - IOMD_IO0CURA) +#define CURB (IOMD_IO0CURB - IOMD_IO0CURA) +#define ENDB (IOMD_IO0ENDB - IOMD_IO0CURA) +#define CR (IOMD_IO0CR - IOMD_IO0CURA) +#define ST (IOMD_IO0ST - IOMD_IO0CURA) + +static void iomd_get_next_sg(struct scatterlist *sg, struct iomd_dma *idma) +{ + unsigned long end, offset, flags = 0; + + if (idma->dma.sg) { + sg->dma_address = idma->dma_addr; + offset = sg->dma_address & ~PAGE_MASK; + + end = offset + idma->dma_len; + + if (end > PAGE_SIZE) + end = PAGE_SIZE; + + if (offset + TRANSFER_SIZE >= end) + flags |= DMA_END_L; + + sg->length = end - TRANSFER_SIZE; + + idma->dma_len -= end - offset; + idma->dma_addr += end - offset; + + if (idma->dma_len == 0) { + if (idma->dma.sgcount > 1) { + idma->dma.sg = sg_next(idma->dma.sg); + idma->dma_addr = idma->dma.sg->dma_address; + idma->dma_len = idma->dma.sg->length; + idma->dma.sgcount--; + } else { + idma->dma.sg = NULL; + flags |= DMA_END_S; + } + } + } else { + flags = DMA_END_S | DMA_END_L; + sg->dma_address = 0; + sg->length = 0; + } + + sg->length |= flags; +} + +static irqreturn_t iomd_dma_handle(int irq, void *dev_id) +{ + struct iomd_dma *idma = dev_id; + unsigned long base = idma->base; + + do { + unsigned int status; + + status = iomd_readb(base + ST); + if (!(status & DMA_ST_INT)) + return IRQ_HANDLED; + + if ((idma->state ^ status) & DMA_ST_AB) + iomd_get_next_sg(&idma->cur_sg, idma); + + switch (status & (DMA_ST_OFL | DMA_ST_AB)) { + case DMA_ST_OFL: /* OIA */ + case DMA_ST_AB: /* .IB */ + iomd_writel(idma->cur_sg.dma_address, base + CURA); + iomd_writel(idma->cur_sg.length, base + ENDA); + idma->state = DMA_ST_AB; + break; + + case DMA_ST_OFL | DMA_ST_AB: /* OIB */ + case 0: /* .IA */ + iomd_writel(idma->cur_sg.dma_address, base + CURB); + iomd_writel(idma->cur_sg.length, base + ENDB); + idma->state = 0; + break; + } + + if (status & DMA_ST_OFL && + idma->cur_sg.length == (DMA_END_S|DMA_END_L)) + break; + } while (1); + + idma->state = ~DMA_ST_AB; + disable_irq(irq); + + return IRQ_HANDLED; +} + +static int iomd_request_dma(unsigned int chan, dma_t *dma) +{ + struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); + + return request_irq(idma->irq, iomd_dma_handle, + IRQF_DISABLED, idma->dma.device_id, idma); +} + +static void iomd_free_dma(unsigned int chan, dma_t *dma) +{ + struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); + + free_irq(idma->irq, idma); +} + +static void iomd_enable_dma(unsigned int chan, dma_t *dma) +{ + struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); + unsigned long dma_base = idma->base; + unsigned int ctrl = TRANSFER_SIZE | DMA_CR_E; + + if (idma->dma.invalid) { + idma->dma.invalid = 0; + + /* + * Cope with ISA-style drivers which expect cache + * coherence. + */ + if (!idma->dma.sg) { + idma->dma.sg = &idma->dma.buf; + idma->dma.sgcount = 1; + idma->dma.buf.length = idma->dma.count; + idma->dma.buf.dma_address = dma_map_single(NULL, + idma->dma.addr, idma->dma.count, + idma->dma.dma_mode == DMA_MODE_READ ? + DMA_FROM_DEVICE : DMA_TO_DEVICE); + } + + iomd_writeb(DMA_CR_C, dma_base + CR); + idma->state = DMA_ST_AB; + } + + if (idma->dma.dma_mode == DMA_MODE_READ) + ctrl |= DMA_CR_D; + + iomd_writeb(ctrl, dma_base + CR); + enable_irq(idma->irq); +} + +static void iomd_disable_dma(unsigned int chan, dma_t *dma) +{ + struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); + unsigned long dma_base = idma->base; + unsigned long flags; + + local_irq_save(flags); + if (idma->state != ~DMA_ST_AB) + disable_irq(idma->irq); + iomd_writeb(0, dma_base + CR); + local_irq_restore(flags); +} + +static int iomd_set_dma_speed(unsigned int chan, dma_t *dma, int cycle) +{ + int tcr, speed; + + if (cycle < 188) + speed = 3; + else if (cycle <= 250) + speed = 2; + else if (cycle < 438) + speed = 1; + else + speed = 0; + + tcr = iomd_readb(IOMD_DMATCR); + speed &= 3; + + switch (chan) { + case DMA_0: + tcr = (tcr & ~0x03) | speed; + break; + + case DMA_1: + tcr = (tcr & ~0x0c) | (speed << 2); + break; + + case DMA_2: + tcr = (tcr & ~0x30) | (speed << 4); + break; + + case DMA_3: + tcr = (tcr & ~0xc0) | (speed << 6); + break; + + default: + break; + } + + iomd_writeb(tcr, IOMD_DMATCR); + + return speed; +} + +static struct dma_ops iomd_dma_ops = { + .type = "IOMD", + .request = iomd_request_dma, + .free = iomd_free_dma, + .enable = iomd_enable_dma, + .disable = iomd_disable_dma, + .setspeed = iomd_set_dma_speed, +}; + +static struct fiq_handler fh = { + .name = "floppydma" +}; + +struct floppy_dma { + struct dma_struct dma; + unsigned int fiq; +}; + +static void floppy_enable_dma(unsigned int chan, dma_t *dma) +{ + struct floppy_dma *fdma = container_of(dma, struct floppy_dma, dma); + void *fiqhandler_start; + unsigned int fiqhandler_length; + struct pt_regs regs; + + if (fdma->dma.sg) + BUG(); + + if (fdma->dma.dma_mode == DMA_MODE_READ) { + extern unsigned char floppy_fiqin_start, floppy_fiqin_end; + fiqhandler_start = &floppy_fiqin_start; + fiqhandler_length = &floppy_fiqin_end - &floppy_fiqin_start; + } else { + extern unsigned char floppy_fiqout_start, floppy_fiqout_end; + fiqhandler_start = &floppy_fiqout_start; + fiqhandler_length = &floppy_fiqout_end - &floppy_fiqout_start; + } + + regs.ARM_r9 = fdma->dma.count; + regs.ARM_r10 = (unsigned long)fdma->dma.addr; + regs.ARM_fp = (unsigned long)FLOPPYDMA_BASE; + + if (claim_fiq(&fh)) { + printk("floppydma: couldn't claim FIQ.\n"); + return; + } + + set_fiq_handler(fiqhandler_start, fiqhandler_length); + set_fiq_regs(®s); + enable_fiq(fdma->fiq); +} + +static void floppy_disable_dma(unsigned int chan, dma_t *dma) +{ + struct floppy_dma *fdma = container_of(dma, struct floppy_dma, dma); + disable_fiq(fdma->fiq); + release_fiq(&fh); +} + +static int floppy_get_residue(unsigned int chan, dma_t *dma) +{ + struct pt_regs regs; + get_fiq_regs(®s); + return regs.ARM_r9; +} + +static struct dma_ops floppy_dma_ops = { + .type = "FIQDMA", + .enable = floppy_enable_dma, + .disable = floppy_disable_dma, + .residue = floppy_get_residue, +}; + +/* + * This is virtual DMA - we don't need anything here. + */ +static void sound_enable_disable_dma(unsigned int chan, dma_t *dma) +{ +} + +static struct dma_ops sound_dma_ops = { + .type = "VIRTUAL", + .enable = sound_enable_disable_dma, + .disable = sound_enable_disable_dma, +}; + +static struct iomd_dma iomd_dma[6]; + +static struct floppy_dma floppy_dma = { + .dma = { + .d_ops = &floppy_dma_ops, + }, + .fiq = FIQ_FLOPPYDATA, +}; + +static dma_t sound_dma = { + .d_ops = &sound_dma_ops, +}; + +static int __init rpc_dma_init(void) +{ + unsigned int i; + int ret; + + iomd_writeb(0, IOMD_IO0CR); + iomd_writeb(0, IOMD_IO1CR); + iomd_writeb(0, IOMD_IO2CR); + iomd_writeb(0, IOMD_IO3CR); + + iomd_writeb(0xa0, IOMD_DMATCR); + + /* + * Setup DMA channels 2,3 to be for podules + * and channels 0,1 for internal devices + */ + iomd_writeb(DMA_EXT_IO3|DMA_EXT_IO2, IOMD_DMAEXT); + + iomd_dma[DMA_0].base = IOMD_IO0CURA; + iomd_dma[DMA_0].irq = IRQ_DMA0; + iomd_dma[DMA_1].base = IOMD_IO1CURA; + iomd_dma[DMA_1].irq = IRQ_DMA1; + iomd_dma[DMA_2].base = IOMD_IO2CURA; + iomd_dma[DMA_2].irq = IRQ_DMA2; + iomd_dma[DMA_3].base = IOMD_IO3CURA; + iomd_dma[DMA_3].irq = IRQ_DMA3; + iomd_dma[DMA_S0].base = IOMD_SD0CURA; + iomd_dma[DMA_S0].irq = IRQ_DMAS0; + iomd_dma[DMA_S1].base = IOMD_SD1CURA; + iomd_dma[DMA_S1].irq = IRQ_DMAS1; + + for (i = DMA_0; i <= DMA_S1; i++) { + iomd_dma[i].dma.d_ops = &iomd_dma_ops; + + ret = isa_dma_add(i, &iomd_dma[i].dma); + if (ret) + printk("IOMDDMA%u: unable to register: %d\n", i, ret); + } + + ret = isa_dma_add(DMA_VIRTUAL_FLOPPY, &floppy_dma.dma); + if (ret) + printk("IOMDFLOPPY: unable to register: %d\n", ret); + ret = isa_dma_add(DMA_VIRTUAL_SOUND, &sound_dma); + if (ret) + printk("IOMDSOUND: unable to register: %d\n", ret); + return 0; +} +core_initcall(rpc_dma_init); diff --git a/arch/arm/mach-rpc/include/mach/acornfb.h b/arch/arm/mach-rpc/include/mach/acornfb.h new file mode 100644 index 00000000..395d7628 --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/acornfb.h @@ -0,0 +1,140 @@ +/* + * arch/arm/mach-rpc/include/mach/acornfb.h + * + * Copyright (C) 1999 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * AcornFB architecture specific code + */ + +#define acornfb_bandwidth(var) ((var)->pixclock * 8 / (var)->bits_per_pixel) + +static inline int +acornfb_valid_pixrate(struct fb_var_screeninfo *var) +{ + u_long limit; + + if (!var->pixclock) + return 0; + + /* + * Limits below are taken from RISC OS bandwidthlimit file + */ + if (current_par.using_vram) { + if (current_par.vram_half_sam == 2048) + limit = 6578; + else + limit = 13157; + } else { + limit = 26315; + } + + return acornfb_bandwidth(var) >= limit; +} + +/* + * Try to find the best PLL parameters for the pixel clock. + * This algorithm seems to give best predictable results, + * and produces the same values as detailed in the VIDC20 + * data sheet. + */ +static inline u_int +acornfb_vidc20_find_pll(u_int pixclk) +{ + u_int r, best_r = 2, best_v = 2; + int best_d = 0x7fffffff; + + for (r = 2; r <= 32; r++) { + u_int rr, v, p; + int d; + + rr = 41667 * r; + + v = (rr + pixclk / 2) / pixclk; + + if (v > 32 || v < 2) + continue; + + p = (rr + v / 2) / v; + + d = pixclk - p; + + if (d < 0) + d = -d; + + if (d < best_d) { + best_d = d; + best_v = v - 1; + best_r = r - 1; + } + + if (d == 0) + break; + } + + return best_v << 8 | best_r; +} + +static inline void +acornfb_vidc20_find_rates(struct vidc_timing *vidc, + struct fb_var_screeninfo *var) +{ + u_int div; + + /* Select pixel-clock divisor to keep PLL in range */ + div = var->pixclock / 9090; /*9921*/ + + /* Limit divisor */ + if (div == 0) + div = 1; + if (div > 8) + div = 8; + + /* Encode divisor to VIDC20 setting */ + switch (div) { + case 1: vidc->control |= VIDC20_CTRL_PIX_CK; break; + case 2: vidc->control |= VIDC20_CTRL_PIX_CK2; break; + case 3: vidc->control |= VIDC20_CTRL_PIX_CK3; break; + case 4: vidc->control |= VIDC20_CTRL_PIX_CK4; break; + case 5: vidc->control |= VIDC20_CTRL_PIX_CK5; break; + case 6: vidc->control |= VIDC20_CTRL_PIX_CK6; break; + case 7: vidc->control |= VIDC20_CTRL_PIX_CK7; break; + case 8: vidc->control |= VIDC20_CTRL_PIX_CK8; break; + } + + /* + * With VRAM, the FIFO can be set to the highest possible setting + * because there are no latency considerations for other memory + * accesses. However, in 64 bit bus mode the FIFO preload value + * must not be set to VIDC20_CTRL_FIFO_28 because this will let + * the FIFO overflow. See VIDC20 manual page 33 (6.0 Setting the + * FIFO preload value). + */ + if (current_par.using_vram) { + if (current_par.vram_half_sam == 2048) + vidc->control |= VIDC20_CTRL_FIFO_24; + else + vidc->control |= VIDC20_CTRL_FIFO_28; + } else { + unsigned long bandwidth = acornfb_bandwidth(var); + + /* Encode bandwidth as VIDC20 setting */ + if (bandwidth > 33334) /* < 30.0MB/s */ + vidc->control |= VIDC20_CTRL_FIFO_16; + else if (bandwidth > 26666) /* < 37.5MB/s */ + vidc->control |= VIDC20_CTRL_FIFO_20; + else if (bandwidth > 22222) /* < 45.0MB/s */ + vidc->control |= VIDC20_CTRL_FIFO_24; + else /* > 45.0MB/s */ + vidc->control |= VIDC20_CTRL_FIFO_28; + } + + /* Find the PLL values */ + vidc->pll_ctl = acornfb_vidc20_find_pll(var->pixclock / div); +} + +#define acornfb_default_control() (VIDC20_CTRL_PIX_VCLK) +#define acornfb_default_econtrol() (VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3)) diff --git a/arch/arm/mach-rpc/include/mach/debug-macro.S b/arch/arm/mach-rpc/include/mach/debug-macro.S new file mode 100644 index 00000000..85effffd --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/debug-macro.S @@ -0,0 +1,23 @@ +/* arch/arm/mach-rpc/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + + .macro addruart, rp, rv + mov \rp, #0x00010000 + orr \rp, \rp, #0x00000fe0 + orr \rv, \rp, #0xe0000000 @ virtual + orr \rp, \rp, #0x03000000 @ physical + .endm + +#define UART_SHIFT 2 +#define FLOW_CONTROL +#include <asm/hardware/debug-8250.S> diff --git a/arch/arm/mach-rpc/include/mach/entry-macro.S b/arch/arm/mach-rpc/include/mach/entry-macro.S new file mode 100644 index 00000000..4e7e5414 --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/entry-macro.S @@ -0,0 +1,16 @@ +#include <mach/hardware.h> +#include <asm/hardware/entry-macro-iomd.S> + + .equ ioc_base_high, IOC_BASE & 0xff000000 + .equ ioc_base_low, IOC_BASE & 0x00ff0000 + + .macro get_irqnr_preamble, base, tmp + mov \base, #ioc_base_high @ point at IOC + .if ioc_base_low + orr \base, \base, #ioc_base_low + .endif + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + diff --git a/arch/arm/mach-rpc/include/mach/hardware.h b/arch/arm/mach-rpc/include/mach/hardware.h new file mode 100644 index 00000000..dde6b3c0 --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/hardware.h @@ -0,0 +1,83 @@ +/* + * arch/arm/mach-rpc/include/mach/hardware.h + * + * Copyright (C) 1996-1999 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This file contains the hardware definitions of the RiscPC series machines. + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include <mach/memory.h> + +#ifndef __ASSEMBLY__ +#define IOMEM(x) ((void __iomem *)(unsigned long)(x)) +#else +#define IOMEM(x) x +#endif /* __ASSEMBLY__ */ + +/* + * What hardware must be present + */ +#define HAS_IOMD +#define HAS_VIDC20 + +/* Hardware addresses of major areas. + * *_START is the physical address + * *_SIZE is the size of the region + * *_BASE is the virtual address + */ +#define RAM_SIZE 0x10000000 +#define RAM_START 0x10000000 + +#define EASI_SIZE 0x08000000 /* EASI I/O */ +#define EASI_START 0x08000000 +#define EASI_BASE 0xe5000000 + +#define IO_START 0x03000000 /* I/O */ +#define IO_SIZE 0x01000000 +#define IO_BASE IOMEM(0xe0000000) + +#define SCREEN_START 0x02000000 /* VRAM */ +#define SCREEN_END 0xdfc00000 +#define SCREEN_BASE 0xdf800000 + +#define UNCACHEABLE_ADDR 0xdf010000 + +/* + * IO Addresses + */ +#define VIDC_BASE IOMEM(0xe0400000) +#define EXPMASK_BASE 0xe0360000 +#define IOMD_BASE IOMEM(0xe0200000) +#define IOC_BASE IOMEM(0xe0200000) +#define PCIO_BASE IOMEM(0xe0010000) +#define FLOPPYDMA_BASE IOMEM(0xe002a000) + +#define vidc_writel(val) __raw_writel(val, VIDC_BASE) + +#define IO_EC_EASI_BASE 0x81400000 +#define IO_EC_IOC4_BASE 0x8009c000 +#define IO_EC_IOC_BASE 0x80090000 +#define IO_EC_MEMC8_BASE 0x8000ac00 +#define IO_EC_MEMC_BASE 0x80000000 + +#define NETSLOT_BASE 0x0302b000 +#define NETSLOT_SIZE 0x00001000 + +#define PODSLOT_IOC0_BASE 0x03240000 +#define PODSLOT_IOC4_BASE 0x03270000 +#define PODSLOT_IOC_SIZE (1 << 14) +#define PODSLOT_MEMC_BASE 0x03000000 +#define PODSLOT_MEMC_SIZE (1 << 14) +#define PODSLOT_EASI_BASE 0x08000000 +#define PODSLOT_EASI_SIZE (1 << 24) + +#define EXPMASK_STATUS (EXPMASK_BASE + 0x00) +#define EXPMASK_ENABLE (EXPMASK_BASE + 0x04) + +#endif diff --git a/arch/arm/mach-rpc/include/mach/io.h b/arch/arm/mach-rpc/include/mach/io.h new file mode 100644 index 00000000..20da7f48 --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/io.h @@ -0,0 +1,213 @@ +/* + * arch/arm/mach-rpc/include/mach/io.h + * + * Copyright (C) 1997 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Modifications: + * 06-Dec-1997 RMK Created. + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#include <mach/hardware.h> + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * We use two different types of addressing - PC style addresses, and ARM + * addresses. PC style accesses the PC hardware with the normal PC IO + * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ + * and are translated to the start of IO. Note that all addresses are + * shifted left! + */ +#define __PORT_PCIO(x) (!((x) & 0x80000000)) + +/* + * Dynamic IO functions. + */ +static inline void __outb (unsigned int value, unsigned int port) +{ + unsigned long temp; + __asm__ __volatile__( + "tst %2, #0x80000000\n\t" + "mov %0, %4\n\t" + "addeq %0, %0, %3\n\t" + "strb %1, [%0, %2, lsl #2] @ outb" + : "=&r" (temp) + : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) + : "cc"); +} + +static inline void __outw (unsigned int value, unsigned int port) +{ + unsigned long temp; + __asm__ __volatile__( + "tst %2, #0x80000000\n\t" + "mov %0, %4\n\t" + "addeq %0, %0, %3\n\t" + "str %1, [%0, %2, lsl #2] @ outw" + : "=&r" (temp) + : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) + : "cc"); +} + +static inline void __outl (unsigned int value, unsigned int port) +{ + unsigned long temp; + __asm__ __volatile__( + "tst %2, #0x80000000\n\t" + "mov %0, %4\n\t" + "addeq %0, %0, %3\n\t" + "str %1, [%0, %2, lsl #2] @ outl" + : "=&r" (temp) + : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) + : "cc"); +} + +#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ +static inline unsigned sz __in##fnsuffix (unsigned int port) \ +{ \ + unsigned long temp, value; \ + __asm__ __volatile__( \ + "tst %2, #0x80000000\n\t" \ + "mov %0, %4\n\t" \ + "addeq %0, %0, %3\n\t" \ + "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ + : "=&r" (temp), "=r" (value) \ + : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ + : "cc"); \ + return (unsigned sz)value; \ +} + +static inline void __iomem *__deprecated __ioaddr(unsigned int port) +{ + void __iomem *ret; + if (__PORT_PCIO(port)) + ret = PCIO_BASE; + else + ret = IO_BASE; + return ret + (port << 2); +} + +#define DECLARE_IO(sz,fnsuffix,instr) \ + DECLARE_DYN_IN(sz,fnsuffix,instr) + +DECLARE_IO(char,b,"b") +DECLARE_IO(short,w,"") +DECLARE_IO(int,l,"") + +#undef DECLARE_IO +#undef DECLARE_DYN_IN + +/* + * Constant address IO functions + * + * These have to be macros for the 'J' constraint to work - + * +/-4096 immediate operand. + */ +#define __outbc(value,port) \ +({ \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "strb %0, [%1, %2] @ outbc" \ + : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "strb %0, [%1, %2] @ outbc" \ + : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \ +}) + +#define __inbc(port) \ +({ \ + unsigned char result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2] @ inbc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2] @ inbc" \ + : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ + result; \ +}) + +#define __outwc(value,port) \ +({ \ + unsigned long __v = value; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outwc" \ + : : "r" (__v|__v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outwc" \ + : : "r" (__v|__v<<16), "r" (IO_BASE), "r" ((port) << 2)); \ +}) + +#define __inwc(port) \ +({ \ + unsigned short result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inwc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inwc" \ + : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ + result & 0xffff; \ +}) + +#define __outlc(value,port) \ +({ \ + unsigned long __v = value; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outlc" \ + : : "r" (__v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outlc" \ + : : "r" (__v), "r" (IO_BASE), "r" ((port) << 2)); \ +}) + +#define __inlc(port) \ +({ \ + unsigned long result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inlc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inlc" \ + : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ + result; \ +}) + +#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) +#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) +#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) +#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) +#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) +#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) + +/* the following macro is deprecated */ +#define ioaddr(port) ((unsigned long)__ioaddr((port))) + +#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l) +#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l) + +#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l) +#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) + +/* + * 1:1 mapping for ioremapped regions. + */ +#define __mem_pci(x) (x) + +#endif diff --git a/arch/arm/mach-rpc/include/mach/irqs.h b/arch/arm/mach-rpc/include/mach/irqs.h new file mode 100644 index 00000000..3d203749 --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/irqs.h @@ -0,0 +1,47 @@ +/* + * arch/arm/mach-rpc/include/mach/irqs.h + * + * Copyright (C) 1996 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define IRQ_PRINTER 0 +#define IRQ_BATLOW 1 +#define IRQ_FLOPPYINDEX 2 +#define IRQ_VSYNCPULSE 3 +#define IRQ_POWERON 4 +#define IRQ_TIMER0 5 +#define IRQ_TIMER1 6 +#define IRQ_IMMEDIATE 7 +#define IRQ_EXPCARDFIQ 8 +#define IRQ_HARDDISK 9 +#define IRQ_SERIALPORT 10 +#define IRQ_FLOPPYDISK 12 +#define IRQ_EXPANSIONCARD 13 +#define IRQ_KEYBOARDTX 14 +#define IRQ_KEYBOARDRX 15 + +#define IRQ_DMA0 16 +#define IRQ_DMA1 17 +#define IRQ_DMA2 18 +#define IRQ_DMA3 19 +#define IRQ_DMAS0 20 +#define IRQ_DMAS1 21 + +#define FIQ_FLOPPYDATA 0 +#define FIQ_ECONET 2 +#define FIQ_SERIALPORT 4 +#define FIQ_EXPANSIONCARD 6 +#define FIQ_FORCE 7 + +/* + * This is the offset of the FIQ "IRQ" numbers + */ +#define FIQ_START 64 + +#define IRQ_TIMER IRQ_TIMER0 + +#define NR_IRQS 128 diff --git a/arch/arm/mach-rpc/include/mach/isa-dma.h b/arch/arm/mach-rpc/include/mach/isa-dma.h new file mode 100644 index 00000000..67bfc671 --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/isa-dma.h @@ -0,0 +1,29 @@ +/* + * arch/arm/mach-rpc/include/mach/isa-dma.h + * + * Copyright (C) 1997 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#define MAX_DMA_CHANNELS 8 + +#define DMA_0 0 +#define DMA_1 1 +#define DMA_2 2 +#define DMA_3 3 +#define DMA_S0 4 +#define DMA_S1 5 +#define DMA_VIRTUAL_FLOPPY 6 +#define DMA_VIRTUAL_SOUND 7 + +#define DMA_FLOPPY DMA_VIRTUAL_FLOPPY + +#define IOMD_DMA_BOUNDARY (PAGE_SIZE - 1) + +#endif /* _ASM_ARCH_DMA_H */ + diff --git a/arch/arm/mach-rpc/include/mach/memory.h b/arch/arm/mach-rpc/include/mach/memory.h new file mode 100644 index 00000000..18a22109 --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/memory.h @@ -0,0 +1,40 @@ +/* + * arch/arm/mach-rpc/include/mach/memory.h + * + * Copyright (C) 1996,1997,1998 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 20-Oct-1996 RMK Created + * 31-Dec-1997 RMK Fixed definitions to reduce warnings + * 11-Jan-1998 RMK Uninlined to reduce hits on cache + * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt + * 21-Mar-1999 RMK Renamed to memory.h + * RMK Added TASK_SIZE and PAGE_OFFSET + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +/* + * Physical DRAM offset. + */ +#define PLAT_PHYS_OFFSET UL(0x10000000) + +/* + * Cache flushing area - ROM + */ +#define FLUSH_BASE_PHYS 0x00000000 +#define FLUSH_BASE 0xdf000000 + +/* + * Sparsemem support. Each section is a maximum of 64MB. The sections + * are offset by 128MB and can cover 128MB, so that gives us a maximum + * of 29 physmem bits. + */ +#define MAX_PHYSMEM_BITS 29 +#define SECTION_SIZE_BITS 26 + +#endif diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h new file mode 100644 index 00000000..45c7b935 --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/system.h @@ -0,0 +1,27 @@ +/* + * arch/arm/mach-rpc/include/mach/system.h + * + * Copyright (C) 1996-1999 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/io.h> +#include <mach/hardware.h> +#include <asm/hardware/iomd.h> + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +static inline void arch_reset(char mode, const char *cmd) +{ + iomd_writeb(0, IOMD_ROMCR0); + + /* + * Jump into the ROM + */ + cpu_reset(0); +} diff --git a/arch/arm/mach-rpc/include/mach/timex.h b/arch/arm/mach-rpc/include/mach/timex.h new file mode 100644 index 00000000..dd75e738 --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/timex.h @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-rpc/include/mach/timex.h + * + * Copyright (C) 1997, 1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * RiscPC architecture timex specifications + */ + +/* + * On the RiscPC, the clock ticks at 2MHz. + */ +#define CLOCK_TICK_RATE 2000000 + diff --git a/arch/arm/mach-rpc/include/mach/uncompress.h b/arch/arm/mach-rpc/include/mach/uncompress.h new file mode 100644 index 00000000..9cd9bcda --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/uncompress.h @@ -0,0 +1,196 @@ +/* + * arch/arm/mach-rpc/include/mach/uncompress.h + * + * Copyright (C) 1996 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#define VIDMEM ((char *)SCREEN_START) + +#include <linux/io.h> +#include <mach/hardware.h> +#include <asm/setup.h> +#include <asm/page.h> + +int video_size_row; +unsigned char bytes_per_char_h; +extern unsigned long con_charconvtable[256]; + +struct param_struct { + unsigned long page_size; + unsigned long nr_pages; + unsigned long ramdisk_size; + unsigned long mountrootrdonly; + unsigned long rootdev; + unsigned long video_num_cols; + unsigned long video_num_rows; + unsigned long video_x; + unsigned long video_y; + unsigned long memc_control_reg; + unsigned char sounddefault; + unsigned char adfsdrives; + unsigned char bytes_per_char_h; + unsigned char bytes_per_char_v; + unsigned long unused[256/4-11]; +}; + +static const unsigned long palette_4[16] = { + 0x00000000, + 0x000000cc, + 0x0000cc00, /* Green */ + 0x0000cccc, /* Yellow */ + 0x00cc0000, /* Blue */ + 0x00cc00cc, /* Magenta */ + 0x00cccc00, /* Cyan */ + 0x00cccccc, /* White */ + 0x00000000, + 0x000000ff, + 0x0000ff00, + 0x0000ffff, + 0x00ff0000, + 0x00ff00ff, + 0x00ffff00, + 0x00ffffff +}; + +#define palette_setpixel(p) *(unsigned long *)(IO_START+0x00400000) = 0x10000000|((p) & 255) +#define palette_write(v) *(unsigned long *)(IO_START+0x00400000) = 0x00000000|((v) & 0x00ffffff) + +/* + * params_phys is a linker defined symbol - see + * arch/arm/boot/compressed/Makefile + */ +extern __attribute__((pure)) struct param_struct *params(void); +#define params (params()) + +#ifndef STANDALONE_DEBUG +unsigned long video_num_cols; +unsigned long video_num_rows; +unsigned long video_x; +unsigned long video_y; +unsigned char bytes_per_char_v; +int white; + +/* + * This does not append a newline + */ +static void putc(int c) +{ + extern void ll_write_char(char *, char c, char white); + int x,y; + char *ptr; + + x = video_x; + y = video_y; + + if (c == '\n') { + if (++y >= video_num_rows) + y--; + } else if (c == '\r') { + x = 0; + } else { + ptr = VIDMEM + ((y*video_num_cols*bytes_per_char_v+x)*bytes_per_char_h); + ll_write_char(ptr, c, white); + if (++x >= video_num_cols) { + x = 0; + if ( ++y >= video_num_rows ) { + y--; + } + } + } + + video_x = x; + video_y = y; +} + +static inline void flush(void) +{ +} + +/* + * Setup for decompression + */ +static void arch_decomp_setup(void) +{ + int i; + struct tag *t = (struct tag *)params; + unsigned int nr_pages = 0, page_size = PAGE_SIZE; + + if (t->hdr.tag == ATAG_CORE) + { + for (; t->hdr.size; t = tag_next(t)) + { + if (t->hdr.tag == ATAG_VIDEOTEXT) + { + video_num_rows = t->u.videotext.video_lines; + video_num_cols = t->u.videotext.video_cols; + bytes_per_char_h = t->u.videotext.video_points; + bytes_per_char_v = t->u.videotext.video_points; + video_x = t->u.videotext.x; + video_y = t->u.videotext.y; + } + + if (t->hdr.tag == ATAG_MEM) + { + page_size = PAGE_SIZE; + nr_pages += (t->u.mem.size / PAGE_SIZE); + } + } + } + else + { + nr_pages = params->nr_pages; + page_size = params->page_size; + video_num_rows = params->video_num_rows; + video_num_cols = params->video_num_cols; + video_x = params->video_x; + video_y = params->video_y; + bytes_per_char_h = params->bytes_per_char_h; + bytes_per_char_v = params->bytes_per_char_v; + } + + video_size_row = video_num_cols * bytes_per_char_h; + + if (bytes_per_char_h == 4) + for (i = 0; i < 256; i++) + con_charconvtable[i] = + (i & 128 ? 1 << 0 : 0) | + (i & 64 ? 1 << 4 : 0) | + (i & 32 ? 1 << 8 : 0) | + (i & 16 ? 1 << 12 : 0) | + (i & 8 ? 1 << 16 : 0) | + (i & 4 ? 1 << 20 : 0) | + (i & 2 ? 1 << 24 : 0) | + (i & 1 ? 1 << 28 : 0); + else + for (i = 0; i < 16; i++) + con_charconvtable[i] = + (i & 8 ? 1 << 0 : 0) | + (i & 4 ? 1 << 8 : 0) | + (i & 2 ? 1 << 16 : 0) | + (i & 1 ? 1 << 24 : 0); + + + palette_setpixel(0); + if (bytes_per_char_h == 1) { + palette_write (0); + palette_write (0x00ffffff); + for (i = 2; i < 256; i++) + palette_write (0); + white = 1; + } else { + for (i = 0; i < 256; i++) + palette_write (i < 16 ? palette_4[i] : 0); + white = 7; + } + + if (nr_pages * page_size < 4096*1024) error("<4M of mem\n"); +} +#endif + +/* + * nothing to do + */ +#define arch_decomp_wdog() diff --git a/arch/arm/mach-rpc/include/mach/vmalloc.h b/arch/arm/mach-rpc/include/mach/vmalloc.h new file mode 100644 index 00000000..fb700228 --- /dev/null +++ b/arch/arm/mach-rpc/include/mach/vmalloc.h @@ -0,0 +1,10 @@ +/* + * arch/arm/mach-rpc/include/mach/vmalloc.h + * + * Copyright (C) 1997 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#define VMALLOC_END 0xdc000000UL diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c new file mode 100644 index 00000000..2e1b5309 --- /dev/null +++ b/arch/arm/mach-rpc/irq.c @@ -0,0 +1,162 @@ +#include <linux/init.h> +#include <linux/list.h> +#include <linux/io.h> + +#include <asm/mach/irq.h> +#include <asm/hardware/iomd.h> +#include <asm/irq.h> + +static void iomd_ack_irq_a(struct irq_data *d) +{ + unsigned int val, mask; + + mask = 1 << d->irq; + val = iomd_readb(IOMD_IRQMASKA); + iomd_writeb(val & ~mask, IOMD_IRQMASKA); + iomd_writeb(mask, IOMD_IRQCLRA); +} + +static void iomd_mask_irq_a(struct irq_data *d) +{ + unsigned int val, mask; + + mask = 1 << d->irq; + val = iomd_readb(IOMD_IRQMASKA); + iomd_writeb(val & ~mask, IOMD_IRQMASKA); +} + +static void iomd_unmask_irq_a(struct irq_data *d) +{ + unsigned int val, mask; + + mask = 1 << d->irq; + val = iomd_readb(IOMD_IRQMASKA); + iomd_writeb(val | mask, IOMD_IRQMASKA); +} + +static struct irq_chip iomd_a_chip = { + .irq_ack = iomd_ack_irq_a, + .irq_mask = iomd_mask_irq_a, + .irq_unmask = iomd_unmask_irq_a, +}; + +static void iomd_mask_irq_b(struct irq_data *d) +{ + unsigned int val, mask; + + mask = 1 << (d->irq & 7); + val = iomd_readb(IOMD_IRQMASKB); + iomd_writeb(val & ~mask, IOMD_IRQMASKB); +} + +static void iomd_unmask_irq_b(struct irq_data *d) +{ + unsigned int val, mask; + + mask = 1 << (d->irq & 7); + val = iomd_readb(IOMD_IRQMASKB); + iomd_writeb(val | mask, IOMD_IRQMASKB); +} + +static struct irq_chip iomd_b_chip = { + .irq_ack = iomd_mask_irq_b, + .irq_mask = iomd_mask_irq_b, + .irq_unmask = iomd_unmask_irq_b, +}; + +static void iomd_mask_irq_dma(struct irq_data *d) +{ + unsigned int val, mask; + + mask = 1 << (d->irq & 7); + val = iomd_readb(IOMD_DMAMASK); + iomd_writeb(val & ~mask, IOMD_DMAMASK); +} + +static void iomd_unmask_irq_dma(struct irq_data *d) +{ + unsigned int val, mask; + + mask = 1 << (d->irq & 7); + val = iomd_readb(IOMD_DMAMASK); + iomd_writeb(val | mask, IOMD_DMAMASK); +} + +static struct irq_chip iomd_dma_chip = { + .irq_ack = iomd_mask_irq_dma, + .irq_mask = iomd_mask_irq_dma, + .irq_unmask = iomd_unmask_irq_dma, +}; + +static void iomd_mask_irq_fiq(struct irq_data *d) +{ + unsigned int val, mask; + + mask = 1 << (d->irq & 7); + val = iomd_readb(IOMD_FIQMASK); + iomd_writeb(val & ~mask, IOMD_FIQMASK); +} + +static void iomd_unmask_irq_fiq(struct irq_data *d) +{ + unsigned int val, mask; + + mask = 1 << (d->irq & 7); + val = iomd_readb(IOMD_FIQMASK); + iomd_writeb(val | mask, IOMD_FIQMASK); +} + +static struct irq_chip iomd_fiq_chip = { + .irq_ack = iomd_mask_irq_fiq, + .irq_mask = iomd_mask_irq_fiq, + .irq_unmask = iomd_unmask_irq_fiq, +}; + +void __init rpc_init_irq(void) +{ + unsigned int irq, flags; + + iomd_writeb(0, IOMD_IRQMASKA); + iomd_writeb(0, IOMD_IRQMASKB); + iomd_writeb(0, IOMD_FIQMASK); + iomd_writeb(0, IOMD_DMAMASK); + + for (irq = 0; irq < NR_IRQS; irq++) { + flags = IRQF_VALID; + + if (irq <= 6 || (irq >= 9 && irq <= 15)) + flags |= IRQF_PROBE; + + if (irq == 21 || (irq >= 16 && irq <= 19) || + irq == IRQ_KEYBOARDTX) + flags |= IRQF_NOAUTOEN; + + switch (irq) { + case 0 ... 7: + irq_set_chip_and_handler(irq, &iomd_a_chip, + handle_level_irq); + set_irq_flags(irq, flags); + break; + + case 8 ... 15: + irq_set_chip_and_handler(irq, &iomd_b_chip, + handle_level_irq); + set_irq_flags(irq, flags); + break; + + case 16 ... 21: + irq_set_chip_and_handler(irq, &iomd_dma_chip, + handle_level_irq); + set_irq_flags(irq, flags); + break; + + case 64 ... 71: + irq_set_chip(irq, &iomd_fiq_chip); + set_irq_flags(irq, IRQF_VALID); + break; + } + } + + init_FIQ(); +} + diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c new file mode 100644 index 00000000..580b3c73 --- /dev/null +++ b/arch/arm/mach-rpc/riscpc.c @@ -0,0 +1,227 @@ +/* + * linux/arch/arm/mach-rpc/riscpc.c + * + * Copyright (C) 1998-2001 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Architecture specific fixups. + */ +#include <linux/kernel.h> +#include <linux/tty.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/init.h> +#include <linux/sched.h> +#include <linux/device.h> +#include <linux/serial_8250.h> +#include <linux/ata_platform.h> +#include <linux/io.h> +#include <linux/i2c.h> + +#include <asm/elf.h> +#include <asm/mach-types.h> +#include <mach/hardware.h> +#include <asm/page.h> +#include <asm/domain.h> +#include <asm/setup.h> + +#include <asm/mach/map.h> +#include <asm/mach/arch.h> +#include <asm/mach/time.h> + +extern void rpc_init_irq(void); + +unsigned int vram_size; +unsigned int memc_ctrl_reg; +unsigned int number_mfm_drives; + +static int __init parse_tag_acorn(const struct tag *tag) +{ + memc_ctrl_reg = tag->u.acorn.memc_control_reg; + number_mfm_drives = tag->u.acorn.adfsdrives; + + switch (tag->u.acorn.vram_pages) { + case 512: + vram_size += PAGE_SIZE * 256; + case 256: + vram_size += PAGE_SIZE * 256; + default: + break; + } +#if 0 + if (vram_size) { + desc->video_start = 0x02000000; + desc->video_end = 0x02000000 + vram_size; + } +#endif + return 0; +} + +__tagtable(ATAG_ACORN, parse_tag_acorn); + +static struct map_desc rpc_io_desc[] __initdata = { + { /* VRAM */ + .virtual = SCREEN_BASE, + .pfn = __phys_to_pfn(SCREEN_START), + .length = 2*1048576, + .type = MT_DEVICE + }, { /* IO space */ + .virtual = (u32)IO_BASE, + .pfn = __phys_to_pfn(IO_START), + .length = IO_SIZE , + .type = MT_DEVICE + }, { /* EASI space */ + .virtual = EASI_BASE, + .pfn = __phys_to_pfn(EASI_START), + .length = EASI_SIZE, + .type = MT_DEVICE + } +}; + +static void __init rpc_map_io(void) +{ + iotable_init(rpc_io_desc, ARRAY_SIZE(rpc_io_desc)); + + /* + * Turn off floppy. + */ + writeb(0xc, PCIO_BASE + (0x3f2 << 2)); + + /* + * RiscPC can't handle half-word loads and stores + */ + elf_hwcap &= ~HWCAP_HALF; +} + +static struct resource acornfb_resources[] = { + { /* VIDC */ + .start = 0x03400000, + .end = 0x035fffff, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_VSYNCPULSE, + .end = IRQ_VSYNCPULSE, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device acornfb_device = { + .name = "acornfb", + .id = -1, + .dev = { + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(acornfb_resources), + .resource = acornfb_resources, +}; + +static struct resource iomd_resources[] = { + { + .start = 0x03200000, + .end = 0x0320ffff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device iomd_device = { + .name = "iomd", + .id = -1, + .num_resources = ARRAY_SIZE(iomd_resources), + .resource = iomd_resources, +}; + +static struct platform_device kbd_device = { + .name = "kart", + .id = -1, + .dev = { + .parent = &iomd_device.dev, + }, +}; + +static struct plat_serial8250_port serial_platform_data[] = { + { + .mapbase = 0x03010fe0, + .irq = 10, + .uartclk = 1843200, + .regshift = 2, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST, + }, + { }, +}; + +static struct platform_device serial_device = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = serial_platform_data, + }, +}; + +static struct pata_platform_info pata_platform_data = { + .ioport_shift = 2, +}; + +static struct resource pata_resources[] = { + [0] = { + .start = 0x030107c0, + .end = 0x030107df, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 0x03010fd8, + .end = 0x03010fdb, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = IRQ_HARDDISK, + .end = IRQ_HARDDISK, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device pata_device = { + .name = "pata_platform", + .id = -1, + .num_resources = ARRAY_SIZE(pata_resources), + .resource = pata_resources, + .dev = { + .platform_data = &pata_platform_data, + .coherent_dma_mask = ~0, /* grumble */ + }, +}; + +static struct platform_device *devs[] __initdata = { + &iomd_device, + &kbd_device, + &serial_device, + &acornfb_device, + &pata_device, +}; + +static struct i2c_board_info i2c_rtc = { + I2C_BOARD_INFO("pcf8583", 0x50) +}; + +static int __init rpc_init(void) +{ + i2c_register_board_info(0, &i2c_rtc, 1); + return platform_add_devices(devs, ARRAY_SIZE(devs)); +} + +arch_initcall(rpc_init); + +extern struct sys_timer ioc_timer; + +MACHINE_START(RISCPC, "Acorn-RiscPC") + /* Maintainer: Russell King */ + .boot_params = 0x10000100, + .reserve_lp0 = 1, + .reserve_lp1 = 1, + .map_io = rpc_map_io, + .init_irq = rpc_init_irq, + .timer = &ioc_timer, +MACHINE_END |