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| author | James <git@panaceas.org> | 2014-05-05 17:54:12 +0100 |
|---|---|---|
| committer | James <git@panaceas.org> | 2014-05-05 17:54:12 +0100 |
| commit | 0dd7af76f012e9a02182ed37b7cb0be3dcd55fed (patch) | |
| tree | edd0bcc8c90a630a0c72eb561fad07df95e55af9 /libdpf/spiflash.h | |
| parent | d00119c905bccaa796a885e17f945f5644404772 (diff) | |
| download | kmd_usb-0dd7af76f012e9a02182ed37b7cb0be3dcd55fed.tar.gz kmd_usb-0dd7af76f012e9a02182ed37b7cb0be3dcd55fed.tar.bz2 kmd_usb-0dd7af76f012e9a02182ed37b7cb0be3dcd55fed.zip | |
indent
Diffstat (limited to 'libdpf/spiflash.h')
| -rw-r--r-- | libdpf/spiflash.h | 34 |
1 files changed, 16 insertions, 18 deletions
diff --git a/libdpf/spiflash.h b/libdpf/spiflash.h index fe7a8fd..5ee90d6 100644 --- a/libdpf/spiflash.h +++ b/libdpf/spiflash.h @@ -5,26 +5,24 @@ */ -#define SPM_RDID 0x9f // Read Id -#define SPM_NO_CMD 0x00 // No command +#define SPM_RDID 0x9f // Read Id +#define SPM_NO_CMD 0x00 // No command -#define SPM_WREN 0x06 // Write enable -#define SPM_WRDI 0x04 // Write disable -#define SPM_RDSR 0x05 // Read status register -#define SPM_WRSR 0x01 // Write status register -#define SPM_READ 0x03 // Read data bytes -#define SPM_PP 0x02 // Page program -#define SPM_DP 0xb9 // Deep power down -#define SPM_RES 0xab // Release from deep power down +#define SPM_WREN 0x06 // Write enable +#define SPM_WRDI 0x04 // Write disable +#define SPM_RDSR 0x05 // Read status register +#define SPM_WRSR 0x01 // Write status register +#define SPM_READ 0x03 // Read data bytes +#define SPM_PP 0x02 // Page program +#define SPM_DP 0xb9 // Deep power down +#define SPM_RES 0xab // Release from deep power down // and read signature -#define SPM_FLASH_SE 0xd8 // Sector erase -#define SPM_FLASH_BE 0xc7 // Bulk erase -#define SPM_FLASH_FAST_READ 0x0B // Read data bytes fast +#define SPM_FLASH_SE 0xd8 // Sector erase +#define SPM_FLASH_BE 0xc7 // Bulk erase +#define SPM_FLASH_FAST_READ 0x0B // Read data bytes fast -#define SPM_SR_SRWD 0x80 // SR write protection (HW) +#define SPM_SR_SRWD 0x80 // SR write protection (HW) // Status register bit definitions -#define SPS_WIP 0x01 // write in progress -#define SPS_WEL 0x02 // write enable latch - - +#define SPS_WIP 0x01 // write in progress +#define SPS_WEL 0x02 // write enable latch |