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authorJohn Crispin <blogic@openwrt.org>2015-12-17 09:26:51 +0000
committerJohn Crispin <blogic@openwrt.org>2015-12-17 09:26:51 +0000
commit4933d323d75fedd7a4f38a2502a6f285b1e76807 (patch)
treefa05ae7d94de0ec0efcfed4f8aa088c77d1488d2
parentbdbc340bee7d7fdea64efe61b71eba3f862204c0 (diff)
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ramips: change CM_GCR_BASE_CMDEFTGT_MEM value to match datasheet
Zero config value for default memory region means 'memory', not not 'disabled' according to 'Control Registers Of The Coherency Manager' manual. Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47906 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r--target/linux/ramips/patches-4.3/0063-set-CM_GCR_BASE_CMDEFTGT_MEM-according-to-datasheet.patch12
1 files changed, 12 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-4.3/0063-set-CM_GCR_BASE_CMDEFTGT_MEM-according-to-datasheet.patch b/target/linux/ramips/patches-4.3/0063-set-CM_GCR_BASE_CMDEFTGT_MEM-according-to-datasheet.patch
new file mode 100644
index 0000000000..6b9e9e3bc0
--- /dev/null
+++ b/target/linux/ramips/patches-4.3/0063-set-CM_GCR_BASE_CMDEFTGT_MEM-according-to-datasheet.patch
@@ -0,0 +1,12 @@
+--- a/arch/mips/include/asm/mips-cm.h
++++ b/arch/mips/include/asm/mips-cm.h
+@@ -225,8 +225,7 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80)
+ #define CM_GCR_BASE_GCRBASE_MSK (_ULCAST_(0x1ffff) << 15)
+ #define CM_GCR_BASE_CMDEFTGT_SHF 0
+ #define CM_GCR_BASE_CMDEFTGT_MSK (_ULCAST_(0x3) << 0)
+-#define CM_GCR_BASE_CMDEFTGT_DISABLED 0
+-#define CM_GCR_BASE_CMDEFTGT_MEM 1
++#define CM_GCR_BASE_CMDEFTGT_MEM 0
+ #define CM_GCR_BASE_CMDEFTGT_IOCU0 2
+ #define CM_GCR_BASE_CMDEFTGT_IOCU1 3
+