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authorGabor Juhos <juhosg@openwrt.org>2011-12-28 08:43:36 +0000
committerGabor Juhos <juhosg@openwrt.org>2011-12-28 08:43:36 +0000
commit6d8bc6597d9a3feec9c92387901684b40bf5662e (patch)
treed22c7f47eb5b0e358f2d7427ff3b3ede9229590d
parent51a587a8b05f5b1762125453ab27e1cfaa716491 (diff)
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ramips: rt288x: change base address and window size of flash bank 0
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29616 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r--target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h
index 2ae26ef8b5..b5f4812b5c 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h
@@ -29,7 +29,7 @@
#define RT2880_PCI_BASE 0x00440000
#define RT2880_WMAC_BASE 0x00480000
#define RT2880_FLASH1_BASE 0x01000000
-#define RT2880_FLASH0_BASE 0x1fc00000
+#define RT2880_FLASH0_BASE 0x1dc00000
#define RT2880_SDRAM_BASE 0x08000000
#define RT2880_SYSC_SIZE 0x100
@@ -40,7 +40,7 @@
#define RT2880_PIO_SIZE 0x100
#define RT2880_UART1_SIZE 0x100
#define RT2880_FLASH1_SIZE (16 * 1024 * 1024)
-#define RT2880_FLASH0_SIZE (4 * 1024 * 1024)
+#define RT2880_FLASH0_SIZE (32 * 1024 * 1024)
/* SYSC registers */
#define SYSC_REG_CHIP_NAME0 0x000 /* Chip Name 0 */