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| author | John Crispin <blogic@openwrt.org> | 2015-08-17 06:15:49 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2015-08-17 06:15:49 +0000 |
| commit | a7eceebab82fac224d8e83e0577e12e54c6ad725 (patch) | |
| tree | e4c58982842cd51f0524ca9885d16c9e5624676e /rules.mk | |
| parent | 4821b875c6aefcc76272e343e5fb150b625aeada (diff) | |
| download | master-187ad058-a7eceebab82fac224d8e83e0577e12e54c6ad725.tar.gz master-187ad058-a7eceebab82fac224d8e83e0577e12e54c6ad725.tar.bz2 master-187ad058-a7eceebab82fac224d8e83e0577e12e54c6ad725.zip | |
ramips: Fix MT7621 pinmux bits for uart3, uart2, mdio
The MT7621 uses a 2 bit wide configuration of the sdhci, spi, mdio, pcie,
wdt, uart2 and uart3 in the GPIO_MODE register. It was correctly done
for sdhci, spi, pcie and wdt, The same has to be done for uart3, uart2
and mdio.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@46645 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'rules.mk')
0 files changed, 0 insertions, 0 deletions