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author | Florian Fainelli <florian@openwrt.org> | 2007-03-26 07:32:10 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2007-03-26 07:32:10 +0000 |
commit | 0bc2ef44fca165c83c4372cd8cfde5ad93524e0f (patch) | |
tree | ed167fa9e9f43744ad7ad709509d12c1a2eea834 /target/linux/adm5120-2.6 | |
parent | 640ac733dabdc208aa25b896e06c3957fda0286e (diff) | |
download | master-187ad058-0bc2ef44fca165c83c4372cd8cfde5ad93524e0f.tar.gz master-187ad058-0bc2ef44fca165c83c4372cd8cfde5ad93524e0f.tar.bz2 master-187ad058-0bc2ef44fca165c83c4372cd8cfde5ad93524e0f.zip |
Preserve fw_arg0-3 to allow runtime bootloader detection (Gabor Juhos)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6711 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/adm5120-2.6')
-rw-r--r-- | target/linux/adm5120-2.6/image/lzma-loader/src/decompress.c | 12 | ||||
-rw-r--r-- | target/linux/adm5120-2.6/image/lzma-loader/src/head.S | 43 |
2 files changed, 37 insertions, 18 deletions
diff --git a/target/linux/adm5120-2.6/image/lzma-loader/src/decompress.c b/target/linux/adm5120-2.6/image/lzma-loader/src/decompress.c index b0ed2fc8c4..d3610241f6 100644 --- a/target/linux/adm5120-2.6/image/lzma-loader/src/decompress.c +++ b/target/linux/adm5120-2.6/image/lzma-loader/src/decompress.c @@ -30,6 +30,9 @@ * 24-Apr-2005 Oleg I. Vdovikin * reordered functions using lds script, removed forward decl * + * 24-Mar-2007 Gabor Juhos + * pass original values of the a0,a1,a2,a3 registers to the kernel + * */ #include "LzmaDecode.h" @@ -93,6 +96,9 @@ extern unsigned char workspace[]; unsigned int offset; unsigned char *data; +typedef void (*kernel_entry)(unsigned long reg_a0, unsigned long reg_a1, + unsigned long reg_a2, unsigned long reg_a3); + /* flash access should be aligned, so wrapper is used */ /* read byte from the flash, all accesses are 32-bit aligned */ static int read_byte(void *object, unsigned char **buffer, UInt32 *bufferSize) @@ -119,7 +125,9 @@ static __inline__ unsigned char get_byte(void) } /* should be the first function */ -void entry(unsigned long icache_size, unsigned long icache_lsize, +void entry(unsigned long reg_a0, unsigned long reg_a1, + unsigned long reg_a2, unsigned long reg_a3, + unsigned long icache_size, unsigned long icache_lsize, unsigned long dcache_size, unsigned long dcache_lsize) { unsigned int i; /* temp value */ @@ -173,7 +181,7 @@ void entry(unsigned long icache_size, unsigned long icache_lsize, /* Jump to load address */ uart_write_str("ok\r\n"); - ((void (*)(void)) LOADADDR)(); + ((kernel_entry) LOADADDR)(reg_a0, reg_a1, reg_a2, reg_a3); } uart_write_str("failed\r\n"); while (1 ); diff --git a/target/linux/adm5120-2.6/image/lzma-loader/src/head.S b/target/linux/adm5120-2.6/image/lzma-loader/src/head.S index 9bfbd53d51..7f0e9adc0d 100644 --- a/target/linux/adm5120-2.6/image/lzma-loader/src/head.S +++ b/target/linux/adm5120-2.6/image/lzma-loader/src/head.S @@ -1,3 +1,6 @@ +/* Copyright 2007 Gabor Juhos */ +/* keep original values of the a0,a1,a2,a3 registers */ +/* cache manipulation adapted from Broadcom code */ /* Copyright 2005 Oleg I. Vdovikin (oleg@cs.msu.su) */ /* cache manipulation adapted from Broadcom code */ /* idea taken from original bunzip2 decompressor code */ @@ -40,18 +43,17 @@ .set noreorder /* Copy decompressor code to the right place */ - li t2, BZ_TEXT_START - add a0, t2, 0 - la a1, code_start - la a2, code_stop + li t0, BZ_TEXT_START + + la t1, code_start + la t2, code_stop $L1: - lw t0, 0(a1) - sw t0, 0(a0) - add a1, 4 - add a0, 4 - blt a1, a2, $L1 - nop - + lw t3, 0(t1) + sw t3, 0(t0) + add t1, 4 + blt t1, t2, $L1 + add t0, 4 + /* At this point we need to invalidate dcache and */ /* icache before jumping to new code */ @@ -145,11 +147,20 @@ nodc: addu t0,s3 noic: - move a0,s3 /* icache line size */ - move a1,s4 /* icache size */ - move a2,s1 /* dcache line size */ - jal t2 - move a3,s2 /* dcache size */ + li t0, BZ_TEXT_START + + addiu sp, -32 /* reserve stack for parameters */ +#if 0 + sw a0, 0(sp) + sw a1, 4(sp) + sw a2, 8(sp) + sw a3, 12(sp) +#endif + sw s3, 16(sp) /* icache line size */ + sw s4, 20(sp) /* icache size */ + sw s1, 24(sp) /* dcache line size */ + jr t0 + sw s2, 28(sp) /* dcache size */ .set reorder END(startup) |