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authorGabor Juhos <juhosg@openwrt.org>2009-05-22 11:26:08 +0000
committerGabor Juhos <juhosg@openwrt.org>2009-05-22 11:26:08 +0000
commite8a08bb3a507810d75a4991408c31d71dd002064 (patch)
tree5bc236b1791b9b63ecc1fd044e2987afd83379d0 /target/linux/adm5120/patches-2.6.30
parent7075440170a3d29bda9f985586a9bcfe5f96dd08 (diff)
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[kernel] generic-2.6: move PCI quirk patch from the adm5120 target into the generic patches
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@15985 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/adm5120/patches-2.6.30')
-rw-r--r--target/linux/adm5120/patches-2.6.30/202-pci_disable_common_quirks.patch191
1 files changed, 0 insertions, 191 deletions
diff --git a/target/linux/adm5120/patches-2.6.30/202-pci_disable_common_quirks.patch b/target/linux/adm5120/patches-2.6.30/202-pci_disable_common_quirks.patch
deleted file mode 100644
index 4e6328318c..0000000000
--- a/target/linux/adm5120/patches-2.6.30/202-pci_disable_common_quirks.patch
+++ /dev/null
@@ -1,191 +0,0 @@
---- a/drivers/pci/Kconfig
-+++ b/drivers/pci/Kconfig
-@@ -51,6 +51,12 @@ config PCI_STUB
-
- When in doubt, say N.
-
-+config PCI_DISABLE_COMMON_QUIRKS
-+ bool "PCI disable common quirks"
-+ depends on PCI
-+ help
-+ If you don't know what to do here, say N.
-+
- config HT_IRQ
- bool "Interrupts on hypertransport devices"
- default y
---- a/drivers/pci/quirks.c
-+++ b/drivers/pci/quirks.c
-@@ -98,6 +98,7 @@ static void __devinit quirk_resource_ali
- }
- DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_resource_alignment);
-
-+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
- /* The Mellanox Tavor device gives false positive parity errors
- * Mark this device with a broken_parity_status, to allow
- * PCI scanning code to "skip" this now blacklisted device.
-@@ -132,11 +133,11 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_I
-
- /* The VIA VP2/VP3/MVP3 seem to have some 'features'. There may be a workaround
- but VIA don't answer queries. If you happen to have good contacts at VIA
-- ask them for me please -- Alan
--
-- This appears to be BIOS not version dependent. So presumably there is a
-+ ask them for me please -- Alan
-+
-+ This appears to be BIOS not version dependent. So presumably there is a
- chipset level fix */
--
-+
- static void __devinit quirk_isa_dma_hangs(struct pci_dev *dev)
- {
- if (!isa_dma_bridge_buggy) {
-@@ -204,7 +205,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
- * the info on which Mr Breese based his work.
- *
- * Updated based on further information from the site and also on
-- * information provided by VIA
-+ * information provided by VIA
- */
- static void quirk_vialatency(struct pci_dev *dev)
- {
-@@ -212,7 +213,7 @@ static void quirk_vialatency(struct pci_
- u8 busarb;
- /* Ok we have a potential problem chipset here. Now see if we have
- a buggy southbridge */
--
-+
- p = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, NULL);
- if (p!=NULL) {
- /* 0x40 - 0x4f == 686B, 0x10 - 0x2f == 686A; thanks Dan Hollis */
-@@ -227,9 +228,9 @@ static void quirk_vialatency(struct pci_
- if (p->revision < 0x10 || p->revision > 0x12)
- goto exit;
- }
--
-+
- /*
-- * Ok we have the problem. Now set the PCI master grant to
-+ * Ok we have the problem. Now set the PCI master grant to
- * occur every master grant. The apparent bug is that under high
- * PCI load (quite common in Linux of course) you can get data
- * loss when the CPU is held off the bus for 3 bus master requests
-@@ -242,7 +243,7 @@ static void quirk_vialatency(struct pci_
- */
-
- pci_read_config_byte(dev, 0x76, &busarb);
-- /* Set bit 4 and bi 5 of byte 76 to 0x01
-+ /* Set bit 4 and bi 5 of byte 76 to 0x01
- "Master priority rotation on every PCI master grant */
- busarb &= ~(1<<5);
- busarb |= (1<<4);
-@@ -285,7 +286,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VI
- * that DMA to AGP space. Latency must be set to 0xA and triton
- * workaround applied too
- * [Info kindly provided by ALi]
-- */
-+ */
- static void __init quirk_alimagik(struct pci_dev *dev)
- {
- if ((pci_pci_problems&PCIPCI_ALIMAGIK)==0) {
-@@ -361,7 +362,7 @@ static void __devinit quirk_io_region(st
- pci_claim_resource(dev, nr);
- dev_info(&dev->dev, "quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name);
- }
--}
-+}
-
- /*
- * ATI Northbridge setups MCE the processor if you even
-@@ -418,7 +419,7 @@ static void piix4_io_quirk(struct pci_de
- /*
- * For now we only print it out. Eventually we'll want to
- * reserve it (at least if it's in the 0x1000+ range), but
-- * let's get enough confirmation reports first.
-+ * let's get enough confirmation reports first.
- */
- base &= -size;
- dev_info(&dev->dev, "%s PIO at %04x-%04x\n", name, base, base + size - 1);
-@@ -443,7 +444,7 @@ static void piix4_mem_quirk(struct pci_d
- }
- /*
- * For now we only print it out. Eventually we'll want to
-- * reserve it, but let's get enough confirmation reports first.
-+ * reserve it, but let's get enough confirmation reports first.
- */
- base &= -size;
- dev_info(&dev->dev, "%s MMIO at %04x-%04x\n", name, base, base + size - 1);
-@@ -673,7 +674,7 @@ static void __devinit quirk_vt8235_acpi(
- DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi);
-
-
--#ifdef CONFIG_X86_IO_APIC
-+#ifdef CONFIG_X86_IO_APIC
-
- #include <asm/io_apic.h>
-
-@@ -687,12 +688,12 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_V
- static void quirk_via_ioapic(struct pci_dev *dev)
- {
- u8 tmp;
--
-+
- if (nr_ioapics < 1)
- tmp = 0; /* nothing routed to external APIC */
- else
- tmp = 0x1f; /* all known bits (4-0) routed to external APIC */
--
-+
- dev_info(&dev->dev, "%sbling VIA external APIC routing\n",
- tmp == 0 ? "Disa" : "Ena");
-
-@@ -977,7 +978,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_C
- static void quirk_disable_pxb(struct pci_dev *pdev)
- {
- u16 config;
--
-+
- if (pdev->revision != 0x04) /* Only C0 requires this */
- return;
- pci_read_config_word(pdev, 0x40, &config);
-@@ -1073,11 +1074,11 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
- * On ASUS P4B boards, the SMBus PCI Device within the ICH2/4 southbridge
- * is not activated. The myth is that Asus said that they do not want the
- * users to be irritated by just another PCI Device in the Win98 device
-- * manager. (see the file prog/hotplug/README.p4b in the lm_sensors
-+ * manager. (see the file prog/hotplug/README.p4b in the lm_sensors
- * package 2.7.0 for details)
- *
-- * The SMBus PCI Device can be activated by setting a bit in the ICH LPC
-- * bridge. Unfortunately, this device has no subvendor/subdevice ID. So it
-+ * The SMBus PCI Device can be activated by setting a bit in the ICH LPC
-+ * bridge. Unfortunately, this device has no subvendor/subdevice ID. So it
- * becomes necessary to do this tweak in two steps -- the chosen trigger
- * is either the Host bridge (preferred) or on-board VGA controller.
- *
-@@ -1229,7 +1230,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
- static void asus_hides_smbus_lpc(struct pci_dev *dev)
- {
- u16 val;
--
-+
- if (likely(!asus_hides_smbus))
- return;
-
-@@ -1859,7 +1860,9 @@ static void __devinit fixup_rev1_53c810(
- }
- }
- DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810);
-+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
-
-+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
- /* Enable 1k I/O space granularity on the Intel P64H2 */
- static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev)
- {
-@@ -2463,6 +2466,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
- DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e7, quirk_i82576_sriov);
-
- #endif /* CONFIG_PCI_IOV */
-+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
-
- static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
- struct pci_fixup *end)