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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-04-25 12:57:33 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-04-25 12:57:33 +0000 |
| commit | e1a582c1ce36074d9e481afe66c88a8c7d7a8376 (patch) | |
| tree | 2a4d205fd4cde0b74a467cf30081e0ab4c627ba9 /target/linux/adm5120/patches-3.3/102-jedec_pmc_39lvxxx_chips.patch | |
| parent | 0965fa8af6cd23a5871b3b12053a97c559f97d18 (diff) | |
| download | master-187ad058-e1a582c1ce36074d9e481afe66c88a8c7d7a8376.tar.gz master-187ad058-e1a582c1ce36074d9e481afe66c88a8c7d7a8376.tar.bz2 master-187ad058-e1a582c1ce36074d9e481afe66c88a8c7d7a8376.zip | |
adm5120: add 3.3 support
Partially based on the 3.1 patches by Hartmut Knaack <knaack.h [at] gmx.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31474 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/adm5120/patches-3.3/102-jedec_pmc_39lvxxx_chips.patch')
| -rw-r--r-- | target/linux/adm5120/patches-3.3/102-jedec_pmc_39lvxxx_chips.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/target/linux/adm5120/patches-3.3/102-jedec_pmc_39lvxxx_chips.patch b/target/linux/adm5120/patches-3.3/102-jedec_pmc_39lvxxx_chips.patch new file mode 100644 index 0000000000..00148fa602 --- /dev/null +++ b/target/linux/adm5120/patches-3.3/102-jedec_pmc_39lvxxx_chips.patch @@ -0,0 +1,68 @@ +--- a/drivers/mtd/chips/jedec_probe.c ++++ b/drivers/mtd/chips/jedec_probe.c +@@ -115,6 +115,10 @@ + #define UPD29F064115 0x221C + + /* PMC */ ++#define PM39LV512 0x001B ++#define PM39LV010 0x001C ++#define PM39LV020 0x003D ++#define PM39LV040 0x003E + #define PM49FL002 0x006D + #define PM49FL004 0x006E + #define PM49FL008 0x006A +@@ -1259,6 +1263,54 @@ static const struct amd_flash_info jedec + ERASEINFO(0x02000,2), + ERASEINFO(0x04000,1), + } ++ }, { ++ .mfr_id = CFI_MFR_PMC, ++ .dev_id = PM39LV512, ++ .name = "PMC Pm39LV512", ++ .devtypes = CFI_DEVICETYPE_X8, ++ .uaddr = MTD_UADDR_0x0555_0x02AA, ++ .dev_size = SIZE_64KiB, ++ .cmd_set = P_ID_AMD_STD, ++ .nr_regions = 1, ++ .regions = { ++ ERASEINFO(0x01000,16), ++ } ++ }, { ++ .mfr_id = CFI_MFR_PMC, ++ .dev_id = PM39LV010, ++ .name = "PMC Pm39LV010", ++ .devtypes = CFI_DEVICETYPE_X8, ++ .uaddr = MTD_UADDR_0x0555_0x02AA, ++ .dev_size = SIZE_128KiB, ++ .cmd_set = P_ID_AMD_STD, ++ .nr_regions = 1, ++ .regions = { ++ ERASEINFO(0x01000,32), ++ } ++ }, { ++ .mfr_id = CFI_MFR_PMC, ++ .dev_id = PM39LV020, ++ .name = "PMC Pm39LV020", ++ .devtypes = CFI_DEVICETYPE_X8, ++ .uaddr = MTD_UADDR_0x0555_0x02AA, ++ .dev_size = SIZE_256KiB, ++ .cmd_set = P_ID_AMD_STD, ++ .nr_regions = 1, ++ .regions = { ++ ERASEINFO(0x01000,64), ++ } ++ }, { ++ .mfr_id = CFI_MFR_PMC, ++ .dev_id = PM39LV040, ++ .name = "PMC Pm39LV040", ++ .devtypes = CFI_DEVICETYPE_X8, ++ .uaddr = MTD_UADDR_0x0555_0x02AA, ++ .dev_size = SIZE_512KiB, ++ .cmd_set = P_ID_AMD_STD, ++ .nr_regions = 1, ++ .regions = { ++ ERASEINFO(0x01000,128), ++ } + }, { + .mfr_id = CFI_MFR_PMC, + .dev_id = PM49FL002, |