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| author | Hauke Mehrtens <hauke@openwrt.org> | 2012-05-13 15:10:40 +0000 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@openwrt.org> | 2012-05-13 15:10:40 +0000 |
| commit | e46bb17d6e11bf05d504688c3eac7e3b73a5e881 (patch) | |
| tree | b6672dea93059de3c1a3449f25e6b32786b3f03f /target/linux/amazon/patches-3.3/000-mips-bad-intctl.patch | |
| parent | 349852ec5bdc3eb542f46061ed123bd490915381 (diff) | |
| download | master-187ad058-e46bb17d6e11bf05d504688c3eac7e3b73a5e881.tar.gz master-187ad058-e46bb17d6e11bf05d504688c3eac7e3b73a5e881.tar.bz2 master-187ad058-e46bb17d6e11bf05d504688c3eac7e3b73a5e881.zip | |
amazon: update amazon target to kernel 3.3
This is just compile tested, my device is currently not working.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31706 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/amazon/patches-3.3/000-mips-bad-intctl.patch')
| -rw-r--r-- | target/linux/amazon/patches-3.3/000-mips-bad-intctl.patch | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/target/linux/amazon/patches-3.3/000-mips-bad-intctl.patch b/target/linux/amazon/patches-3.3/000-mips-bad-intctl.patch new file mode 100644 index 0000000000..0aa37780a8 --- /dev/null +++ b/target/linux/amazon/patches-3.3/000-mips-bad-intctl.patch @@ -0,0 +1,33 @@ +--- a/arch/mips/kernel/traps.c ++++ b/arch/mips/kernel/traps.c +@@ -1593,7 +1593,16 @@ void __cpuinit per_cpu_trap_init(void) + if (cpu_has_mips_r2) { + cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP; + cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7; ++ if (!cp0_compare_irq) ++ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ; ++ + cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7; ++ if (!cp0_perfcount_irq) ++ cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ; ++ ++ if (arch_fixup_c0_irqs) ++ arch_fixup_c0_irqs(); ++ + if (cp0_perfcount_irq == cp0_compare_irq) + cp0_perfcount_irq = -1; + } else { +--- a/arch/mips/include/asm/irq.h ++++ b/arch/mips/include/asm/irq.h +@@ -139,9 +139,11 @@ extern void free_irqno(unsigned int irq) + * IE7. Since R2 their number has to be read from the c0_intctl register. + */ + #define CP0_LEGACY_COMPARE_IRQ 7 ++#define CP0_LEGACY_PERFCNT_IRQ 7 + + extern int cp0_compare_irq; + extern int cp0_compare_irq_shift; + extern int cp0_perfcount_irq; ++extern void __weak arch_fixup_c0_irqs(void); + + #endif /* _ASM_IRQ_H */ |