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author | Florian Fainelli <florian@openwrt.org> | 2010-03-26 16:07:24 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2010-03-26 16:07:24 +0000 |
commit | 25550010d5c45bdfe187cc46d7c1a746041689e5 (patch) | |
tree | 5022aea91e8df34f5d5e337bc8608743774ecaa3 /target/linux/ar7/patches/500-serial_kludge.patch | |
parent | d614a3c0a88cad0a332bf8e12e16bcc1b43261d1 (diff) | |
download | master-187ad058-25550010d5c45bdfe187cc46d7c1a746041689e5.tar.gz master-187ad058-25550010d5c45bdfe187cc46d7c1a746041689e5.tar.bz2 master-187ad058-25550010d5c45bdfe187cc46d7c1a746041689e5.zip |
[ar7] more cleaning
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20482 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar7/patches/500-serial_kludge.patch')
-rw-r--r-- | target/linux/ar7/patches/500-serial_kludge.patch | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/target/linux/ar7/patches/500-serial_kludge.patch b/target/linux/ar7/patches/500-serial_kludge.patch deleted file mode 100644 index cc4e424ec3..0000000000 --- a/target/linux/ar7/patches/500-serial_kludge.patch +++ /dev/null @@ -1,40 +0,0 @@ ---- a/drivers/serial/8250.c -+++ b/drivers/serial/8250.c -@@ -286,6 +286,13 @@ static const struct serial8250_config ua - .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, - .flags = UART_CAP_FIFO, - }, -+ [PORT_AR7] = { -+ .name = "TI-AR7", -+ .fifo_size = 16, -+ .tx_loadsz = 16, -+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, -+ .flags = UART_CAP_FIFO | UART_CAP_AFE, -+ }, - }; - - #if defined (CONFIG_SERIAL_8250_AU1X00) -@@ -2687,7 +2694,11 @@ static void serial8250_console_putchar(s - { - struct uart_8250_port *up = (struct uart_8250_port *)port; - -+#ifdef CONFIG_AR7 -+ wait_for_xmitr(up, BOTH_EMPTY); -+#else - wait_for_xmitr(up, UART_LSR_THRE); -+#endif - serial_out(up, UART_TX, ch); - } - ---- a/include/linux/serial_core.h -+++ b/include/linux/serial_core.h -@@ -41,7 +41,8 @@ - #define PORT_XSCALE 15 - #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ - #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ --#define PORT_MAX_8250 17 /* max port ID */ -+#define PORT_AR7 18 /* TI AR7 internal UART */ -+#define PORT_MAX_8250 18 /* max port ID */ - - /* - * ARM specific type numbers. These are not currently guaranteed |