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| author | Florian Fainelli <florian@openwrt.org> | 2012-01-28 13:19:43 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2012-01-28 13:19:43 +0000 |
| commit | 906dfaac140f3a0de973c304808a5be042f52b5d (patch) | |
| tree | f475f7e9c2e1292ee840e3d622bfbc5e4cd9ee1a /target/linux/ar71xx/patches-3.2/207-spi-ath79-make-chipselect-logic-more-flexible.patch | |
| parent | 388166a051d057b4a15de2a0f54cd7b5714533ea (diff) | |
| download | master-187ad058-906dfaac140f3a0de973c304808a5be042f52b5d.tar.gz master-187ad058-906dfaac140f3a0de973c304808a5be042f52b5d.tar.bz2 master-187ad058-906dfaac140f3a0de973c304808a5be042f52b5d.zip | |
[ar71xx] refresh 3.2 patches
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29934 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-3.2/207-spi-ath79-make-chipselect-logic-more-flexible.patch')
| -rw-r--r-- | target/linux/ar71xx/patches-3.2/207-spi-ath79-make-chipselect-logic-more-flexible.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ar71xx/patches-3.2/207-spi-ath79-make-chipselect-logic-more-flexible.patch b/target/linux/ar71xx/patches-3.2/207-spi-ath79-make-chipselect-logic-more-flexible.patch index 7c45b73f1f..cada123cb5 100644 --- a/target/linux/ar71xx/patches-3.2/207-spi-ath79-make-chipselect-logic-more-flexible.patch +++ b/target/linux/ar71xx/patches-3.2/207-spi-ath79-make-chipselect-logic-more-flexible.patch @@ -38,7 +38,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org> struct ath79_spi { struct spi_bitbang bitbang; u32 ioc_base; -@@ -62,6 +64,7 @@ static void ath79_spi_chipselect(struct +@@ -62,6 +64,7 @@ static void ath79_spi_chipselect(struct { struct ath79_spi *sp = ath79_spidev_to_sp(spi); int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active; @@ -46,7 +46,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org> if (is_active) { /* set initial clock polarity */ -@@ -73,20 +76,21 @@ static void ath79_spi_chipselect(struct +@@ -73,20 +76,21 @@ static void ath79_spi_chipselect(struct ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); } |