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| author | Florian Fainelli <florian@openwrt.org> | 2012-06-17 16:17:29 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2012-06-17 16:17:29 +0000 |
| commit | ffa83cc2dc9f4226fc529599c24761ad414cf919 (patch) | |
| tree | ab78b31e2a8b3061e8e66012ae64fc9cab965bee /target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch | |
| parent | 3e2e8e81dac6e02785a4bfd8f7a16419d4a69b82 (diff) | |
| download | master-187ad058-ffa83cc2dc9f4226fc529599c24761ad414cf919.tar.gz master-187ad058-ffa83cc2dc9f4226fc529599c24761ad414cf919.tar.bz2 master-187ad058-ffa83cc2dc9f4226fc529599c24761ad414cf919.zip | |
[brcm63xx] fix SPI message control handling for BCM6338/6348
BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of
16-bits. We were previously using a 16-bits write which corrupted the first
byte of the TX FIFO. Also the message type was always set to Full-duplex even
in the case of half-duplex messages.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32409 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch b/target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch index 5c77585ed7..a656de6c77 100644 --- a/target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch +++ b/target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch @@ -85,7 +85,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org> static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set) --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -1092,4 +1092,18 @@ +@@ -1099,4 +1099,18 @@ #define SPI_SSOFFTIME_SHIFT 3 #define SPI_BYTE_SWAP 0x80 |