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authorJonas Gorski <jogo@openwrt.org>2013-05-19 18:32:13 +0000
committerJonas Gorski <jogo@openwrt.org>2013-05-19 18:32:13 +0000
commit1427ffb05c4864ce1bb88aca95b95c5966d282c9 (patch)
tree1462b284b9bb6c1b3416a7de0ddd35dab51959c3 /target/linux/brcm63xx/patches-3.9/028-MIPS-BCM63XX-add-flash-detection-for-BCM6362.patch
parentb8f91d7d3a068b3b1455f01f28820a0eb5ddaf2f (diff)
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bcm63xx: add 3.9 support
Signed-off-by: Jonas Gorski <jogo@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36660 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.9/028-MIPS-BCM63XX-add-flash-detection-for-BCM6362.patch')
-rw-r--r--target/linux/brcm63xx/patches-3.9/028-MIPS-BCM63XX-add-flash-detection-for-BCM6362.patch38
1 files changed, 38 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.9/028-MIPS-BCM63XX-add-flash-detection-for-BCM6362.patch b/target/linux/brcm63xx/patches-3.9/028-MIPS-BCM63XX-add-flash-detection-for-BCM6362.patch
new file mode 100644
index 0000000000..38125a50e9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.9/028-MIPS-BCM63XX-add-flash-detection-for-BCM6362.patch
@@ -0,0 +1,38 @@
+From 01034e48e72783ced82a050e862f82ee3dfdb783 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 21 Nov 2011 00:48:52 +0100
+Subject: [PATCH 7/7] MIPS: BCM63XX: add flash detection for BCM6362
+
+BCM6362 support booting from SPI flash and NAND.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 6 ++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 +
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -77,6 +77,12 @@ static int __init bcm63xx_detect_flash_t
+ return BCM63XX_FLASH_TYPE_PARALLEL;
+ else
+ return BCM63XX_FLASH_TYPE_SERIAL;
++ case BCM6362_CPU_ID:
++ val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
++ if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
++ return BCM63XX_FLASH_TYPE_SERIAL;
++ else
++ return BCM63XX_FLASH_TYPE_NAND;
+ case BCM6368_CPU_ID:
+ val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
+ switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -1372,6 +1372,7 @@
+
+ #define MISC_STRAPBUS_6362_REG 0x14
+ #define STRAPBUS_6362_FCVO_SHIFT 1
++#define STRAPBUS_6362_HSSPI_CLK_FAST (1 << 13)
+ #define STRAPBUS_6362_FCVO_MASK (0x1f << STRAPBUS_6362_FCVO_SHIFT)
+ #define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15)
+ #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15)