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author | Gabor Juhos <juhosg@openwrt.org> | 2010-01-27 21:01:48 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2010-01-27 21:01:48 +0000 |
commit | 873ab6ec5b0b233fc6cdafa97b95389c6325a20b (patch) | |
tree | 3b5e28b07f6c4008c92452a2911e076bcbdb5e63 /target/linux/generic-2.6/files/drivers | |
parent | b940bc10ab6324f1f44efb803ab4e40430dabee3 (diff) | |
download | master-187ad058-873ab6ec5b0b233fc6cdafa97b95389c6325a20b.tar.gz master-187ad058-873ab6ec5b0b233fc6cdafa97b95389c6325a20b.tar.bz2 master-187ad058-873ab6ec5b0b233fc6cdafa97b95389c6325a20b.zip |
rtl8366s: reset the chip early, this allows ethernet to work as soon as possible
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19355 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/generic-2.6/files/drivers')
-rw-r--r-- | target/linux/generic-2.6/files/drivers/net/phy/rtl8366s.c | 54 |
1 files changed, 34 insertions, 20 deletions
diff --git a/target/linux/generic-2.6/files/drivers/net/phy/rtl8366s.c b/target/linux/generic-2.6/files/drivers/net/phy/rtl8366s.c index 833e455dd0..babeddc44a 100644 --- a/target/linux/generic-2.6/files/drivers/net/phy/rtl8366s.c +++ b/target/linux/generic-2.6/files/drivers/net/phy/rtl8366s.c @@ -26,7 +26,7 @@ #endif #define RTL8366S_DRIVER_DESC "Realtek RTL8366S ethernet switch driver" -#define RTL8366S_DRIVER_VER "0.2.0" +#define RTL8366S_DRIVER_VER "0.2.1" #define RTL8366S_PHY_NO_MAX 4 #define RTL8366S_PHY_PAGE_MAX 7 @@ -230,6 +230,31 @@ static inline struct rtl8366s *sw_to_rtl8366s(struct switch_dev *sw) return container_of(sw, struct rtl8366s, dev); } +static int rtl8366s_reset_chip(struct rtl8366s *rtl) +{ + struct rtl8366_smi *smi = &rtl->smi; + int timeout = 10; + u32 data; + + rtl8366_smi_write_reg(smi, RTL8366_RESET_CTRL_REG, + RTL8366_CHIP_CTRL_RESET_HW); + do { + msleep(1); + if (rtl8366_smi_read_reg(smi, RTL8366_RESET_CTRL_REG, &data)) + return -EIO; + + if (!(data & RTL8366_CHIP_CTRL_RESET_HW)) + break; + } while (--timeout); + + if (!timeout) { + printk("Timeout waiting for the switch to reset\n"); + return -EIO; + } + + return 0; +} + static int rtl8366s_read_phy_reg(struct rtl8366s *rtl, u32 phy_no, u32 page, u32 addr, u32 *data) { @@ -1301,25 +1326,11 @@ static int rtl8366s_sw_set_port_pvid(struct switch_dev *dev, int port, int val) static int rtl8366s_sw_reset_switch(struct switch_dev *dev) { struct rtl8366s *rtl = sw_to_rtl8366s(dev); - struct rtl8366_smi *smi = &rtl->smi; - int timeout = 10; - u32 data; - - rtl8366_smi_write_reg(smi, RTL8366_RESET_CTRL_REG, - RTL8366_CHIP_CTRL_RESET_HW); - do { - msleep(1); - if (rtl8366_smi_read_reg(smi, RTL8366_RESET_CTRL_REG, &data)) - return -EIO; - - if (!(data & RTL8366_CHIP_CTRL_RESET_HW)) - break; - } while (--timeout); + int err; - if (!timeout) { - printk("Timeout waiting for the switch to reset\n"); - return -EIO; - } + err = rtl8366s_reset_chip(rtl); + if (err) + return err; return rtl8366s_reset_vlan(rtl); } @@ -1553,8 +1564,11 @@ static int rtl8366s_setup(struct rtl8366s *rtl) dev_info(rtl->parent, "RTL%04x ver. %u chip found\n", chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK); - rtl8366s_debugfs_init(rtl); + ret = rtl8366s_reset_chip(rtl); + if (ret) + return ret; + rtl8366s_debugfs_init(rtl); return 0; } |