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| author | Marek Vasut <marex@denx.de> | 2016-06-20 15:28:36 +0200 |
|---|---|---|
| committer | Zoltan HERPAI <wigyori@uid0.hu> | 2016-06-20 15:28:36 +0200 |
| commit | 870678baa7f8b9a65945237704d84d7724f42459 (patch) | |
| tree | 29dba8a076d9e53752b02f768dcdbe15fa9271cd /target/linux/socfpga/patches-4.4/0032-ARM-socfpga-Add-Candence-QSPI-controller-DT-node.patch | |
| parent | 8864b97350bde1fffe614df3c0bfc0cb34fb40d4 (diff) | |
| download | master-187ad058-870678baa7f8b9a65945237704d84d7724f42459.tar.gz master-187ad058-870678baa7f8b9a65945237704d84d7724f42459.tar.bz2 master-187ad058-870678baa7f8b9a65945237704d84d7724f42459.zip | |
target: socfpga: Add support for QSPI NOR boot
Add necessary kernel backports to support the Cadence QSPI controller
present on the Altera SoCFPGA SoC.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'target/linux/socfpga/patches-4.4/0032-ARM-socfpga-Add-Candence-QSPI-controller-DT-node.patch')
| -rw-r--r-- | target/linux/socfpga/patches-4.4/0032-ARM-socfpga-Add-Candence-QSPI-controller-DT-node.patch | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/target/linux/socfpga/patches-4.4/0032-ARM-socfpga-Add-Candence-QSPI-controller-DT-node.patch b/target/linux/socfpga/patches-4.4/0032-ARM-socfpga-Add-Candence-QSPI-controller-DT-node.patch new file mode 100644 index 0000000000..e6b4ec7a44 --- /dev/null +++ b/target/linux/socfpga/patches-4.4/0032-ARM-socfpga-Add-Candence-QSPI-controller-DT-node.patch @@ -0,0 +1,42 @@ +From 8abee0bfd7bc652e028e51e2b95cbb3bf42fc152 Mon Sep 17 00:00:00 2001 +From: Stefan Roese <sr@denx.de> +Date: Wed, 20 May 2015 10:32:03 +0200 +Subject: [PATCH 32/33] ARM: socfpga: Add Candence QSPI controller DT node + +Now that the device driver is available, lets add the controller node +to the socfpga dtsi. So that the SPI NOR flash can be used. + +Signed-off-by: Stefan Roese <sr@denx.de> +Signed-off-by: Marek Vasut <marex@denx.de> +--- + arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi +index 3ed4abd..ebcd081 100644 +--- a/arch/arm/boot/dts/socfpga.dtsi ++++ b/arch/arm/boot/dts/socfpga.dtsi +@@ -685,6 +685,20 @@ + reg = <0xffff0000 0x10000>; + }; + ++ qspi: spi@ff705000 { ++ compatible = "cdns,qspi-nor"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0xff705000 0x1000>, ++ <0xffa00000 0x1000>; ++ interrupts = <0 151 4>; ++ clocks = <&qspi_clk>; ++ cdns,fifo-depth = <128>; ++ cdns,fifo-width = <4>; ++ cdns,trigger-address = <0x00000000>; ++ status = "disabled"; ++ }; ++ + rst: rstmgr@ffd05000 { + #reset-cells = <1>; + compatible = "altr,rst-mgr"; +-- +2.8.1 + |