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author | Zoltan HERPAI <wigyori@uid0.hu> | 2014-09-21 15:42:36 +0000 |
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committer | Zoltan HERPAI <wigyori@uid0.hu> | 2014-09-21 15:42:36 +0000 |
commit | dcbfc72a884f6243bc3d80ae756abc508be52b41 (patch) | |
tree | b38f0c5e2a5f39defed9d46a2983bd61539703b0 /target/linux/sunxi/patches-3.13/170-2-mmc-simplify-clkdelay.patch | |
parent | ac57ee3293eb3fa5b641c76c1e3155b31c6ca6ae (diff) | |
download | master-187ad058-dcbfc72a884f6243bc3d80ae756abc508be52b41.tar.gz master-187ad058-dcbfc72a884f6243bc3d80ae756abc508be52b41.tar.bz2 master-187ad058-dcbfc72a884f6243bc3d80ae756abc508be52b41.zip |
sunxi: remove 3.13 support
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@42628 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/sunxi/patches-3.13/170-2-mmc-simplify-clkdelay.patch')
-rw-r--r-- | target/linux/sunxi/patches-3.13/170-2-mmc-simplify-clkdelay.patch | 56 |
1 files changed, 0 insertions, 56 deletions
diff --git a/target/linux/sunxi/patches-3.13/170-2-mmc-simplify-clkdelay.patch b/target/linux/sunxi/patches-3.13/170-2-mmc-simplify-clkdelay.patch deleted file mode 100644 index e9685768c8..0000000000 --- a/target/linux/sunxi/patches-3.13/170-2-mmc-simplify-clkdelay.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 40889884d53094fe9987a45f9df99fdf1f311910 Mon Sep 17 00:00:00 2001 -From: Hans de Goede <hdegoede@redhat.com> -Date: Sun, 16 Feb 2014 10:47:51 +0100 -Subject: [PATCH] sunxi-mmc: Simplify clk delay setting - -clk_sunxi_mmc_phase_control() does its own locking, so there is no need to -lock at the host. Without the locking having a separate sunxi_mmc_set_clk_dly() -makes no sense, so simply call clk_sunxi_mmc_phase_control() directly. - -Signed-off-by: Hans de Goede <hdegoede@redhat.com> ---- - drivers/mmc/host/sunxi-mmc.c | 14 ++------------ - 1 file changed, 2 insertions(+), 12 deletions(-) - -diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c -index f33bc30..f4bfaf0 100644 ---- a/drivers/mmc/host/sunxi-mmc.c -+++ b/drivers/mmc/host/sunxi-mmc.c -@@ -420,17 +420,6 @@ static void sunxi_mmc_oclk_onoff(struct sunxi_mmc_host *host, u32 oclk_en) - } - } - --static void sunxi_mmc_set_clk_dly(struct sunxi_mmc_host *smc_host, -- u32 oclk_dly, u32 sclk_dly) --{ -- unsigned long iflags; -- struct clk_hw *hw = __clk_get_hw(smc_host->clk_mod); -- -- spin_lock_irqsave(&smc_host->lock, iflags); -- clk_sunxi_mmc_phase_control(hw, sclk_dly, oclk_dly); -- spin_unlock_irqrestore(&smc_host->lock, iflags); --} -- - struct sunxi_mmc_clk_dly mmc_clk_dly[MMC_CLK_MOD_NUM] = { - { MMC_CLK_400K, 0, 7 }, - { MMC_CLK_25M, 0, 5 }, -@@ -450,6 +439,7 @@ static void sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *smc_host, - u32 sclk_dly; - u32 temp; - struct sunxi_mmc_clk_dly *dly = NULL; -+ struct clk_hw *hw = __clk_get_hw(smc_host->clk_mod); - - newrate = clk_round_rate(smc_host->clk_mod, rate); - if (smc_host->clk_mod_rate == newrate) { -@@ -508,7 +498,7 @@ static void sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *smc_host, - sclk_dly--; - } - -- sunxi_mmc_set_clk_dly(smc_host, oclk_dly, sclk_dly); -+ clk_sunxi_mmc_phase_control(hw, sclk_dly, oclk_dly); - sunxi_mmc_oclk_onoff(smc_host, 1); - - /* oclk_onoff sets various irq status bits, clear these */ --- -1.8.5.5 - |