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author | Luka Perkov <luka@openwrt.org> | 2014-09-10 21:40:19 +0000 |
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committer | Luka Perkov <luka@openwrt.org> | 2014-09-10 21:40:19 +0000 |
commit | e5441232a81d01e2ed46d88e340a30fd6b15b012 (patch) | |
tree | e008cc6bd24a0e2c9b283d94a69f7a027bcfb856 /target/linux/sunxi/patches-3.14/182-clk-sunxi-get-divs-parent-clockname.patch | |
parent | 048910c4e07b6fae28513ce1dea62fe3b6bb03de (diff) | |
download | master-187ad058-e5441232a81d01e2ed46d88e340a30fd6b15b012.tar.gz master-187ad058-e5441232a81d01e2ed46d88e340a30fd6b15b012.tar.bz2 master-187ad058-e5441232a81d01e2ed46d88e340a30fd6b15b012.zip |
kernel: update 3.14 to 3.14.18
Targets were build tested and patches are refreshed.
Signed-off-by: Luka Perkov <luka@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@42463 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/sunxi/patches-3.14/182-clk-sunxi-get-divs-parent-clockname.patch')
-rw-r--r-- | target/linux/sunxi/patches-3.14/182-clk-sunxi-get-divs-parent-clockname.patch | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/target/linux/sunxi/patches-3.14/182-clk-sunxi-get-divs-parent-clockname.patch b/target/linux/sunxi/patches-3.14/182-clk-sunxi-get-divs-parent-clockname.patch index 53f2217247..777dfde856 100644 --- a/target/linux/sunxi/patches-3.14/182-clk-sunxi-get-divs-parent-clockname.patch +++ b/target/linux/sunxi/patches-3.14/182-clk-sunxi-get-divs-parent-clockname.patch @@ -19,11 +19,9 @@ Signed-off-by: Emilio López <emilio@elopez.com.ar> drivers/clk/sunxi/clk-sunxi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c -index 7a2ed98..736fb60 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c -@@ -869,7 +869,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node, +@@ -940,7 +940,7 @@ static void __init sunxi_divs_clk_setup( struct divs_data *data) { struct clk_onecell_data *clk_data; @@ -32,7 +30,7 @@ index 7a2ed98..736fb60 100644 const char *clk_name; struct clk **clks, *pclk; struct clk_hw *gate_hw, *rate_hw; -@@ -883,6 +883,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node, +@@ -954,6 +954,7 @@ static void __init sunxi_divs_clk_setup( /* Set up factor clock that we will be dividing */ pclk = sunxi_factors_clk_setup(node, data->factors); @@ -40,6 +38,3 @@ index 7a2ed98..736fb60 100644 reg = of_iomap(node, 0); --- -2.0.3 - |