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authorJohn Crispin <john@openwrt.org>2015-10-19 10:08:18 +0000
committerJohn Crispin <john@openwrt.org>2015-10-19 10:08:18 +0000
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lantiq: Fixed reading the number of RX FIFOs in the SPI driver
Until now the SPI driver used the TX bits for the RX FIFO. This seems uncritical for now since both are equals on my devices (VR9), but this could cause problems on other SoCs. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 47208
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