layerscape: add 64b/32b target for ls1012ardb device

The QorIQ LS1012A processor, optimized for battery-backed or
USB-powered, integrates a single ARM Cortex-A53 core with a hardware
packet forwarding engine and high-speed interfaces to deliver
line-rate networking performance.
QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
development platform, with a complete debugging environment.
The LS1012ARDB board supports the QorIQ LS1012A processor and is
optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.

LEDE/OPENWRT will auto strip executable program file while make. So we
need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network
fiemware be destroyed, then run make to build ls1012ardb firmware.

The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message.
This issue have noticed the IP owner for investigate, hope he can solve it
earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default
firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4"
bootargs.

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>

1 files changed, 56 insertions, 0 deletions

diff --git a/package/boot/uboot-layerscape/patches/0058-mmc-fsl_esdhc-disable-sdhc2-when-no-card-inserted-fo.patch b/package/boot/uboot-layerscape/patches/0058-mmc-fsl_esdhc-disable-sdhc2-when-no-card-inserted-fo.patch
new file mode 100644
index 0000000000..45366ca689
--- /dev/null
+++ b/package/boot/uboot-layerscape/patches/0058-mmc-fsl_esdhc-disable-sdhc2-when-no-card-inserted-fo.patch
@@ -0,0 +1,56 @@
+From 0499ca266f668c9d72217631151f3b6e15350134 Mon Sep 17 00:00:00 2001
+From: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
+Date: Wed, 15 Jun 2016 17:42:51 +0530
+Subject: [PATCH 58/93] mmc: fsl_esdhc: disable sdhc2 when no card inserted
+ for ls1012ardb
+
+This is a temporary workaround patch for ls1012ardb becasue there
+was host controller hardware issue found on some RDB boards when
+there was no eMMC adapter card inserted. This would cause below
+continious error messages in linux. So this patch is to disable
+sdhc2 when finding there isn't card inserted.
+"mmc1: Controller never released inhibit bit(s)."
+
+Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
+---
+ board/freescale/ls1012ardb/ls1012ardb.c |   24 ++++++++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
+index 90cbd5e..ad4d8ee 100644
+--- a/board/freescale/ls1012ardb/ls1012ardb.c
++++ b/board/freescale/ls1012ardb/ls1012ardb.c
+@@ -171,6 +171,30 @@ int board_early_init_f(void)
+ 	return 0;
+ }
+ 
++int mmc_check_sdhc2_card(void)
++{
++	u8 io = 0;
++	u8 is_card = 0;
++
++	/* Initialize i2c early for Serial flash bank information */
++	i2c_set_bus_num(0);
++
++	if (i2c_read(I2C_MUX_IO1_ADDR, 0, 1, &io, 1) < 0) {
++		printf("Error reading i2c boot information!\n");
++		return 0; /* Don't want to hang() on this error */
++	}
++
++	io = io & 0x0c;
++
++	switch (io) {
++	case 0:
++	case 8:
++		is_card = 1;
++	}
++
++	return is_card;
++}
++
+ int board_init(void)
+ {
+ 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
+-- 
+1.7.9.5
+