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author | Daniel Golle <daniel@makrotopia.org> | 2021-02-20 13:04:38 +0000 |
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committer | Daniel Golle <daniel@makrotopia.org> | 2021-03-11 16:24:53 +0000 |
commit | 9dfc2b3ca4dff28259576e21bc3ade910ff52a05 (patch) | |
tree | bc7a3bbea0fa638ece89027d3f04fcd0d09a9359 /package/boot/uboot-mediatek/patches/003-mt7622-uboot-add-dts-and-config-for-spi-nand.patch | |
parent | e2cffbb80528b1c13bbaba6e53835de378ef3923 (diff) | |
download | upstream-9dfc2b3ca4dff28259576e21bc3ade910ff52a05.tar.gz upstream-9dfc2b3ca4dff28259576e21bc3ade910ff52a05.tar.bz2 upstream-9dfc2b3ca4dff28259576e21bc3ade910ff52a05.zip |
uboot-mediatek: update to 2021.04-rc3 with MediaTek's patches
MediaTek published their current U-Boot patchset on github:
https://github.com/mtk-openwrt/u-boot/commits/mtksoc
Import the platform patches from there (`00-mtk-*.patch`), arrange,
them nicely, drop no longer needed local patches and rebase on top of
U-Boot 2021.04-rc3.
Tested and works well on Linksys E8450 (snand-1ddr) as well as
Bananapi BPi-R64 (sdmmc-2ddr, emmc-2ddr).
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Diffstat (limited to 'package/boot/uboot-mediatek/patches/003-mt7622-uboot-add-dts-and-config-for-spi-nand.patch')
-rw-r--r-- | package/boot/uboot-mediatek/patches/003-mt7622-uboot-add-dts-and-config-for-spi-nand.patch | 57 |
1 files changed, 0 insertions, 57 deletions
diff --git a/package/boot/uboot-mediatek/patches/003-mt7622-uboot-add-dts-and-config-for-spi-nand.patch b/package/boot/uboot-mediatek/patches/003-mt7622-uboot-add-dts-and-config-for-spi-nand.patch deleted file mode 100644 index 7167a498ad..0000000000 --- a/package/boot/uboot-mediatek/patches/003-mt7622-uboot-add-dts-and-config-for-spi-nand.patch +++ /dev/null @@ -1,57 +0,0 @@ -From b1b3c3d2ce62872c8dec4a7d645af6b3c565e094 Mon Sep 17 00:00:00 2001 -From: Sam Shih <sam.shih@mediatek.com> -Date: Mon, 20 Apr 2020 17:11:32 +0800 -Subject: [PATCH 2/3] mt7622 uboot: add dts and config for spi nand - -This patch add dts and config for mt7622 spi nand - -Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> ---- - arch/arm/dts/mt7622-rfb.dts | 6 ++++++ - arch/arm/dts/mt7622.dtsi | 20 ++++++++++++++++++++ - 2 files changed, 26 insertions(+) - ---- a/arch/arm/dts/mt7622-rfb.dts -+++ b/arch/arm/dts/mt7622-rfb.dts -@@ -174,6 +174,12 @@ - }; - }; - -+&nandc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&snfi_pins>; -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; ---- a/arch/arm/dts/mt7622.dtsi -+++ b/arch/arm/dts/mt7622.dtsi -@@ -53,6 +53,26 @@ - #size-cells = <0>; - }; - -+ nandc: nfi@1100d000 { -+ compatible = "mediatek,mt7622-nfc"; -+ reg = <0x1100d000 0x1000>, -+ <0x1100e000 0x1000>; -+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>, -+ <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>; -+ clocks = <&pericfg CLK_PERI_NFI_PD>, -+ <&pericfg CLK_PERI_NFIECC_PD>, -+ <&pericfg CLK_PERI_SNFI_PD>, -+ <&topckgen CLK_TOP_NFI_INFRA_SEL>, -+ <&topckgen CLK_TOP_UNIVPLL2_D8>; -+ clock-names = "nfi_clk", -+ "ecc_clk", -+ "snfi_clk", -+ "spinfi_sel", -+ "spinfi_parent_50m"; -+ nand-ecc-mode = "hw"; -+ status = "disabled"; -+ }; -+ - timer { - compatible = "arm,armv8-timer"; - interrupt-parent = <&gic>; |