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authorJonas Gorski <jogo@openwrt.org>2015-07-22 12:50:59 +0000
committerJonas Gorski <jogo@openwrt.org>2015-07-22 12:50:59 +0000
commit2911b5aa11ed579e74d0f7309ed8935d3ecea62d (patch)
treeb061ffe49e53a98e01cc776455d1abc08e6f9c34 /target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
parent82b1517da231725402adc0d98d709780096ea85c (diff)
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kernel: update 3.18 to 3.18.19
Changelog: * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.19 Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46439
Diffstat (limited to 'target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch')
-rw-r--r--target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
index f8b1264155..1fe0e34ca9 100644
--- a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
+++ b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
@@ -22,7 +22,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
-@@ -1205,6 +1205,10 @@ config SOC_AR934X
+@@ -1229,6 +1229,10 @@ config SOC_AR934X
select PCI_AR724X if PCI
def_bool n
@@ -33,7 +33,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
config SOC_QCA955X
select HW_HAS_PCI
select PCI_AR724X if PCI
-@@ -1247,7 +1251,7 @@ config ATH79_DEV_USB
+@@ -1271,7 +1275,7 @@ config ATH79_DEV_USB
def_bool n
config ATH79_DEV_WMAC