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author | Piotr Dymacz <pepe2k@gmail.com> | 2018-04-04 23:43:51 +0200 |
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committer | Piotr Dymacz <pepe2k@gmail.com> | 2018-04-06 23:11:00 +0200 |
commit | 6148c465561cb5ba0b05ba77ecfe7cd42faeb835 (patch) | |
tree | 4179aa0eb3cc45464cbcd45e51fdd197e2f535ec /target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch | |
parent | bbc2e1d919c635e2c9fd0cd34a3bb3cce2632e97 (diff) | |
download | upstream-6148c465561cb5ba0b05ba77ecfe7cd42faeb835.tar.gz upstream-6148c465561cb5ba0b05ba77ecfe7cd42faeb835.tar.bz2 upstream-6148c465561cb5ba0b05ba77ecfe7cd42faeb835.zip |
ar71xx: drop kernel 4.4 support
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Diffstat (limited to 'target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch')
-rw-r--r-- | target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch b/target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch deleted file mode 100644 index 64fb545b24..0000000000 --- a/target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch +++ /dev/null @@ -1,23 +0,0 @@ -From: Felix Fietkau <nbd@nbd.name> -Date: Wed, 18 May 2016 18:03:31 +0200 -Subject: [PATCH] MIPS: ath79: fix register address in ath79_ddr_wb_flush() - -ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets -need to be a multiple of 4. - -Cc: Alban Bedel <albeu@free.fr> -Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface") -Signed-off-by: Felix Fietkau <nbd@nbd.name> ---- - ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -58,7 +58,7 @@ EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init); - - void ath79_ddr_wb_flush(u32 reg) - { -- void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg; -+ void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg * 4; - - /* Flush the DDR write buffer. */ - __raw_writel(0x1, flush_reg); |