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authorChuanhong Guo <gch981213@gmail.com>2018-07-17 17:09:14 +0800
committerJohn Crispin <john@phrozen.org>2018-07-30 10:43:35 +0200
commita5fa6b3825c18058e6b2e5370041fa6cd9c81d12 (patch)
treeba5b5664a82de48977e1dec5a5f9f54440520f9c /target/linux/ath79/dts/ar7240.dtsi
parent4e5ba5076097cf10865c9d65a6fbe887dba5a467 (diff)
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ath79: ar724x: Fix reset definition for gmac0/gmac1
reset bit 8 is for builtin switch and bit 12 is marked 'reserved' on datasheet. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Diffstat (limited to 'target/linux/ath79/dts/ar7240.dtsi')
-rw-r--r--target/linux/ath79/dts/ar7240.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/ath79/dts/ar7240.dtsi b/target/linux/ath79/dts/ar7240.dtsi
index f662b4b445..397f30b3e1 100644
--- a/target/linux/ath79/dts/ar7240.dtsi
+++ b/target/linux/ath79/dts/ar7240.dtsi
@@ -59,8 +59,8 @@
pll-data = <0x00110000 0x00001099 0x00991099>;
- resets = <&rst 8>, <&rst 9>;
- reset-names = "phy", "mac";
+ resets = <&rst 9>;
+ reset-names = "mac";
phy-mode = "mii";
phy-handle = <&swphy4>;
};
@@ -70,8 +70,8 @@
pll-data = <0x00110000 0x00001099 0x00991099>;
- resets = <&rst 12>, <&rst 13>;
- reset-names = "phy", "mac";
+ resets = <&rst 13>;
+ reset-names = "mac";
phy-mode = "gmii";