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| author | Chuanhong Guo <gch981213@gmail.com> | 2018-07-17 17:09:14 +0800 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2018-07-30 10:43:34 +0200 |
| commit | 85189e4c0051a9ca2fd61e9e9d88663b8012b197 (patch) | |
| tree | 9e6bb19838e41682d70aa66de2a0c87242bbc51b /target/linux/ath79/dts/ar9330.dtsi | |
| parent | bb7fac4369ca3b3a18535d032e84e158b03a35e5 (diff) | |
| download | upstream-85189e4c0051a9ca2fd61e9e9d88663b8012b197.tar.gz upstream-85189e4c0051a9ca2fd61e9e9d88663b8012b197.tar.bz2 upstream-85189e4c0051a9ca2fd61e9e9d88663b8012b197.zip | |
ath79: ag71xx: Rework mdio clock settings
Allow specifying desired mdio clock frequency in dts.
Use default frequency around 5MHz for builtin switch and 2MHz for other mdio bus.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Diffstat (limited to 'target/linux/ath79/dts/ar9330.dtsi')
| -rw-r--r-- | target/linux/ath79/dts/ar9330.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/ar9330.dtsi b/target/linux/ath79/dts/ar9330.dtsi index 4649262b28..a902712e3c 100644 --- a/target/linux/ath79/dts/ar9330.dtsi +++ b/target/linux/ath79/dts/ar9330.dtsi @@ -166,6 +166,7 @@ &mdio1 { status = "okay"; + compatible = "qca,ar9330-mdio"; resets = <&rst 23>; reset-names = "mdio"; |